This code defines a compact, four-layer PCB hardware layout for the Raspberry Pi RP2350A microcontroller module, including the main IC, power regulation, USB-C connector, STM32-compatible headers, and associated passive components, with detailed component footprints, net connections, and copper pour zones for powering and ground references.
# RP2350A USB-C development board
**Local review checkpoint — NOT ready to order.** Do not use historical Gerber ZIPs or historical zero-error claims as approval for this source.
The complete entrypoint is `index.circuit.tsx`. The essentials module is an ordinary placement group within the complete board, not a separately routed subcircuit.
## Current local checkpoint — 2026-09-04
Published `tscircuit@0.0.2463` with Pipeline 9. The board is **44 × 64 mm**, four layers, target thickness 0.8 mm. Width was reduced from 48 mm by 8.3%; this is not a fixed Pico outline. Headers moved inward with the sides; connector pinouts and crystal placement are preserved.
| Fresh complete-board check | Result |
| --- | --- |
| Typecheck | Pass |
| Build/render | Completed, with errors |
| Native routing errors | 4: three via-limit reports and one trace-clearance violation |
| All-layer Gerber shorts | 0 |
| Independent physical connectivity | 59 nets; 0 disconnected, 0 shorted groups, 0 unresolved pads |
| Crystal signal paths | All five zero-via; length limits pass |
| Copper pours | Only inner1 GND; one connected region, no floating fragments detected |
| Required power-width connectivity | Fails on GND, V3V3 and VBUS |
| Ordering approval | **Blocked** |
The short-free result does not resolve regulator routing, decoupling-path lengths, required power widths, assembly data or hardware qualification. See [current verified issues](LOCAL_ELECTRICAL_FIX_STATUS.md) and [power and assembly requirements](POWER_AND_ASSEMBLY_REQUIREMENTS.md).
All PCB traces and vias are generated by the published autorouter. No manual PCB paths, route hints, hand-placed routing vias, route caches, output edits, local dependency overrides or patches are used. Original explicitly requested widths, component values, supplier selections and electrical net membership remain unchanged. Generated copper does not yet satisfy every requested constraint.
[Full-board PCB snapshot](dist/index/pcb.png) · [PCB SVG](dist/index/pcb.svg) · [Circuit JSON](dist/index/circuit.json)
Changes remain local. No project publication or order was made.
## Build and local viewer
```sh
bun install --frozen-lockfile
bun run typecheck
bun run build
bun run dev --port 3021
```
The build CLI can exit 0 despite routing errors. Inspect circuit errors and independently verify physical connectivity and trace widths.
## Historical evidence
The [earlier four-layer verification report](RP2350_FOUR_LAYER_VERIFICATION_2026-09-04.md) describes an older design, not this checkpoint. Current evidence and hashes are recorded in [the current status report](LOCAL_ELECTRICAL_FIX_STATUS.md).
