abse/rp2350-mcu-board

POWER_AND_ASSEMBLY_REQUIREMENTS.md

# Power and assembly requirements

This local four-layer design is undergoing electrical correction. It is not an approved fabrication release. Routing, firmware limits, assembly data and physical tests must all be signed off before ordering production boards.

## Supported power use pending qualification

- Use a current-limited 5 V USB supply for initial bring-up. Measure startup and steady-state current before connecting an unrestricted host supply.
- VBUS on J_RIGHT is directly connected to USB VBUS. It is not an isolated external-power input. Do not connect another supply to it while USB is attached.
- V3V3 on the headers is directly connected to the AP2112 output. Do not inject an external 3.3 V supply or assume reverse-current protection. No dual-supply or battery-power mode is qualified.
- V3V3_EN is pulled toward VBUS through 100 kΩ. It is a pull-low disable control, not a 3.3 V logic output. Any external pull-down device must tolerate the VBUS voltage. The LDO's disabled-output discharge also precludes treating the disabled output as isolated.
- No external-load current rating is approved yet. The AP2112's 600 mA device rating is not the available header current. Include MCU, flash, GPIO and peripheral loads and qualify dissipation at the maximum intended ambient temperature.
- Treat exposed interfaces as 3.3 V signals. Do not infer 5 V tolerance from the presence of a 5 V VBUS header. ADC and powered/unpowered GPIO limits require separate consideration.
- The RGB buffer/LED require VBUS. A 3.3 V-only supply mode is not qualified.

These restrictions document the actual circuit; they do not add reverse blocking, inrush limiting, ESD protection or thermal protection for external loads. If broader power modes or production robustness are required, additional circuit design and validation remain necessary.

## Interfaces

STEMMA QT: pin 1 GND, pin 2 V3V3, pin 3 SDA/GP2, pin 4 SCL/GP3. Peripheral pull-ups and cable capacitance must be checked together. There are no separate onboard I2C pull-ups.

SPI JST: pin 1 GND, pin 2 V3V3, pin 3 SCK/GP18, pin 4 MOSI/GP19, pin 5 MISO/GP16, pin 6 CS/GP17. This is this board's pinout, not a universal SPI connector standard.

GP2/3, GP16–19 and GP15 are shared with the GPIO headers and the I2C, SPI and RGB circuits. Firmware and attached hardware cannot assign conflicting functions to those pins.

## Mechanical and assembly specification

- Target four-layer FR4, 0.8 mm finished thickness, matching the selected USB connector drawing. Confirm the actual board-house stack, finished-thickness tolerance, solder mask and copper weights before release. Use a fine-line process compatible with the 0.1 mm traces; 2 oz copper is not approved for this layout.
- The two USB plastic locating holes are NPTH. Shell anchors remain plated slots. Verify finished-hole dimensions, connector seating and insertion clearance.
- Inductor winding orientation must match the Raspberry Pi regulator reference, with the marked terminal connected to the output side and correctly oriented relative to the output capacitor. Do not allow an assembly service to swap interchangeable-looking inductor terminals arbitrarily.
- Check U1/U2 pin 1, LED polarity and JST/USB orientation against the assembler's CPL convention. Test pads are not purchased/placeable components.
- Approve the stencil aperture pattern, thickness and paste release for the QFN leads and exposed pad. Through-hole header and USB-anchor paste must not be assumed intentional without an agreed pin-in-paste process.
- GPIO header part selection remains unchanged at the user's request. The known 1×22 footprint versus 2×11 BOM mismatch is still an assembly blocker.
- Native tscircuit Gerbers and the diagnostic KiCad export are not release-approved. A separate published circuit-json-to-gerber 0.0.104 check now verifies four copper layers and exactly one through-board drill hit per unique physical via on the current 44 × 64 mm checkpoint. This does not approve the board: routing/width/regulator blockers and full copper/assembly/stack-up verification remain. See LOCAL_ELECTRICAL_FIX_STATUS.md; diagnostic exports must not be ordered.

## Required bring-up evidence

1. Inspect assembly, resistance to ground and polarized components before power.
2. Verify 3.3 V and 1.1 V startup, ripple and regulator transients with a current-limited supply.
3. Test cold boot, reset, BOOTSEL and SWD; verify flash size, erase/program and intended XIP clock.
4. Test oscillator startup across the intended supply/temperature range without excessively loading the crystal pins with probes.
5. Test USB enumeration and sustained transfer in both connector orientations, inrush, power-state behavior and required ESD robustness.
6. Exercise LEDs, GPIO and representative I2C/SPI peripherals, including worst-case simultaneous load.
7. Measure regulator temperature and rail droop at the maximum specified ambient and load. Record a supported current budget only after these tests.

References: [Raspberry Pi hardware guide](https://datasheets.raspberrypi.com/rp2350/hardware-design-with-rp2350.pdf), [AP2112 datasheet](https://www.diodes.com/datasheet/download/AP2112.pdf), and [SHOUHAN USB connector drawing](https://datasheet.lcsc.com/datasheet/pdf/2d53d8d8199c9dd6666d9bc9ac7c3a1e.pdf?productCode=C2765186).