shibosoftwaredev/f1c100s-linux-nema17-stepper-controller

CURRENT_SENSE_PROGRESS.md

# Current sensing integrated — draft checkpoint saved, not fabrication-released

## Round 6 local follow-up (2026-10-19) — not pushed

Current evidence: `reports/round6-fix-status.json`. Circuit SHA256:
`ff8ca9d184d420087442a5095e4bcab870604155a2251947d2c3a157117083a2`.
R_INLINE_A's small solder-land/drill graze is removed. U_ETH pin 30's via is
also moved out of its land, with a manually specified inner1 clock shortcut
instead of the generic return stub. The original 15 mm / two-via limits remain
and native DRC reports 0 errors / 150 warnings. Ordinary intersections are
15 -> 13; 16 thermal records remain unchanged and unqualified.

Gerber shorts, emitted-only continuity, independent copper/drill/pad/PTH,
four Kelvin checks, mechanical/legend checks, TypeScript and BOM tests pass.
Every electrical part/net, placement, pad/hole, schematic/legend/CAD record and
firmware file is unchanged. Only three replay paths differ. Host firmware and
Linux client tests pass; the exact same 6 pass / 26 fail module cases remain.
The existing 20:37 UTC stock snapshot is explicitly rebound only after every
populated designator/code/value was revalidated; no new inventory time claimed.
The fail-closed solder-process export gate and negative copper tests pass.
No manufacturing output, order or flashing. NOT fabrication-ready.

The round-5 board was uploaded separately as `0.4.49-review-fixes-20261019`,
using a frozen source copy and byte verification of all 274 non-dist files.
See `reports/round5-publication.json` for the live cloud-build/default status.
That upload does not contain these round-6 edits. Pre-work recovery:
`../../checkpoints/nema17-pre-round6-20261019-17Ug6H/board-checkpoint.tar.gz`
(SHA256 `cc4c850c7c66ec2e9228041271527046dd93870b9a5174cfe8b5beaf3c13897f`).

### Round-5 publication completed

`0.4.49-review-fixes-20261019` is now the verified development default.
The completed cloud build is `6e0c8164-9870-4c7f-a5f3-10ba649feb61`
(completed 2026-10-19 20:57:11 UTC), with 0 errors / 150 warnings. Its electrical,
PCB, schematic, legend and CAD records match the frozen audited round-5 board;
all 274 non-dist source/evidence files were byte-verified again before promotion.
The default website was reloaded and visually checked with the motor/cable
assembly intact. Proof: `reports/round5-website-default-3d.png`.
An earlier job auto-started while archive batches were still uploading and
later failed; the later completed build, not that attempt, was selected.
Round 6 remains a separately restore-verified LOCAL follow-up, not published.

## Round 5 local fixes (2026-10-19) — not pushed

Historical pre-publication record; round-5 upload status is above.

Current local status is `reports/round5-fix-status.json`, with exact hashes and
fresh verification evidence. Ordinary solder-land/drill intersections decrease
19 -> 15, with none added: C_BUZZER.2, R_ISEN_B.2, C_PD_VDD.2 and
R_BUCK_BOTTOM.2 are cleared. The oscillator candidate was rejected rather than
relaxing its 15 mm budget. Thermal arrays and their 16 intersection records
are unchanged and are not treated as solder-process-qualified.

Fifty-one existing 5 V segments are widened against actual obstacles without
moving centre lines or relaxing copper/drill rules. Some short 0.12 mm necks
remain; no higher board-current rating is claimed. Tiny crowded and off-board
reference names are removed from production ink. Nine readable 1.7 mm labels
identify functional connections and motor pin numbers; source/BOM/CPL keep
all references. Original screw rings and footprint polarity marks remain.
Both faces are visually reviewed and conservative legend clearance checks pass.

The normal build, native check, Gerber shorts, emitted continuity, independent
copper/drill checks, 4 Kelvin tests, mechanical geometry, catalog contracts,
TypeScript, board tests and host firmware/client tests pass. There are still
0 native errors / 150 warnings and exactly the same 6 passing / 26 failing
module test cases. All 230 parts, source nets, placements, PCB/CAD dimensions,
schematic records, firmware, four holes and 335 full-through 0.30/0.45 mm vias
are preserved. The routing-input guard is unchanged. A fresh solder-process
audit now blocks assembly export; negative export/copper tests pass.

This is still NOT fabrication-ready. USB data-port VBUS/attach gating has
been researched but is not installed; it must also work with ROM FEL, not just
a Linux GPIO driver. Ethernet SI/EMI, remaining analog/power layout/budgets,
solder-process qualification and physical motor/harness/first-article checks
remain. No publish, production handoff, order or flashing this round.
Pre-work recovery is restore-verified at
`../../checkpoints/nema17-pre-round5-20261019-ywUpyW/board-checkpoint.tar.gz`.
Publication notes below are historical; they do not describe these new local edits.

## Publication of round 3 (2026-10-19)

Uploaded as `0.4.48-review-fixes-20261019`:
https://tscircuit.com/shibosoftwaredev/f1c100s-linux-nema17-stepper-controller?version=0.4.48-review-fixes-20261019#3d

All 240 source/evidence files are byte-verified. Cloud build `58c3a52f` completed
successfully, and its generated electrical, copper, mechanical and schematic
records match the audited local artifact (0 errors / 150 warnings). A later
duplicate/retry build `16b37c56` failed with `user_code_job_infrastructure_error`;
no source/electrical error was reported. The previous working default
`0.4.47-review-fixes-20261019` is retained instead of selecting that failed
latest-build entry. The version-specific page is viewable. Publication evidence
is `reports/round3-publication.json`; the "not pushed" text below is the
historical pre-publication checkpoint record, not the current upload status.
No new PCB edits, fabrication order or hardware flashing. NOT fabrication-ready.

## Round 3 local fixes, 2026-10-19 — not pushed

Current emitted SHA256:
`17ee8bb72e84095b175fee84ef522ea4404c5aafda8d64124841810e8c155a64`.
The full pre-work checkpoint is
`../../checkpoints/nema17-round3-20261019-Nfouf4/board-checkpoint.tar.gz`.
The authoritative current local report is `reports/round3-fix-status.json`;
older status files below are historical, not current signoff.

Accepted individually verified work:

- Coordinated PE10 fanout: drill violations 7 -> 5.
- Coordinated USB_DP fanout: 5 -> 2.
- PD-status fanout, C_PD_ADC rotation/translation and neighbouring ground/ADC
  via reroutes: 2 -> 0. The capacitor's assembly courtyard also passes.
- SoC capacitor labels: readable spacing, bulk references last, electrically
  common capacitor groups kept together, colliding redundant title removed.
  CLI schematic placement passes; the final schematic equals the visually
  reviewed render in `reports/round3-schematic-sheets/01-soc_support.png`.
- Ordinary drills removed from U_FLASH.5 and R_ISEN_A.2 solder lands. Total
  populated-land/drill intersections decrease 37 -> 35 (includes deliberately
  thermal pads); none added. No thermal array or filled-via process changed.
- Fresh independent copper preflight is now hash-bound and mandatory in the
  verifier; three negative cases plus the actual passing case are tested.

All accepted stages retain 0 native errors, 0 shorts, 0 continuity failures,
0 terminal islands, 0 independent copper findings and all four Kelvin checks.
Final native warnings remain 150. Original parts/nets, firmware, outline,
mounting holes, connector placements and 335 full-stack 0.30/0.45 mm vias are
preserved; only C_PD_ADC changes component placement this round. TypeScript,
six BOM tests, catalog electrical contracts, firmware sanitizers and six Linux
client tests pass. The module suite still has exactly 6 passes / 26 failures;
this is not waived. Inventory was rebound only after revalidating the unchanged
193-part / 81-code BOM; no new inventory lookup/reservation is claimed.

Rejected work: R_ISEN_A's first generated stub widened adjoining copper and
failed the independent preflight; only the per-layer-width-preserving version
is accepted. R_ISEN_B has no legal simple local stub path in the tested region,
so that candidate was not installed. Further part/route rearrangement is needed.

Remaining fabrication blockers: other ordinary via-in-pad and thermal/double-
sided solder process, 178 small silk texts/five outside anchors, Ethernet
pairing/stackup/shield/under-jack copper, 5 V load/drop/thermal budget, long
analog/control routes, inherited module failures/warning discrepancies, actual
rear fasteners/harness and hardware power/Linux/current qualification.
No push, fabrication export/order or hardware flashing. NOT fabrication-ready.

## Review fixes published as development latest, 2026-10-19

`0.4.47-review-fixes-20261019` is now latest. Its custom website build completed
at 2026-10-19T18:23:14.587Z. The 223 published source files match the frozen
snapshot and the generated website circuit matches the accepted electrical,
copper and mechanical records (0 native errors / 150 warnings). The previous
current-sensing checkpoint is retained. Publication evidence is in
`reports/review-fix-publication.json`; this is not fabrication approval.

The user authorized fixing the review issues one at a time. The full pre-fix
source and emitted circuit are preserved at
`../../checkpoints/nema17-review-fixes-20261019-3wRAM9/`.
Stage 1 corrects the eight catalog-value mismatches (the small PD pull-up is
deliberately reconciled to its actual 51 kohm selection), both RX capacitor
packages, and the motor bulk capacitor to stocked CA55-D050M226TE100 22 uF/50 V.
All 193 populated parts pass fresh catalog electrical-value checks. Stage 1
left actual copper byte-equivalent after numeric normalization, with zero
native errors. The replacement's manufacturer drawing was checked; its D-case
fits the unchanged pads, but thermal/ripple/transient bench validation remains.

Accepted stages 2–10 reduce independent drill findings from **202 to 7**, at
three locations, with zero added violations. Native errors remain zero and
warnings decrease from 187 to 150; no checker or clearance rule was disabled.
All-layer shorts, emitted continuity (zero failures/islands), all four Kelvin
tests and the independent copper preflight pass. All 230 components / 213 nets
are preserved. Only eight explicitly checked placements change: PE7/PE5 move
0.06 mm to clear their neighboring exposed pads; C_SV_H, C_D50, PE2, U_PD,
C_B_AVCC and R_PD_STATUS_PULLUP move 0.015–0.040 mm to clear drills. All other
placements, the 42.3 mm outline, mounting pattern, USB locations, driver face,
335 full-stack 0.30/0.45 mm vias and firmware stay unchanged.

The two additional SMD pad-gap violations are resolved. Export now fails closed
on the independent BOM, drill, pad/PTH and legend gates; it stages new files
separately and preserves the previous fabrication handoff. Success and failed
promotion/restore paths are unit-tested. The old 183-part fabrication audit is
historical; no current 193-part fabrication directory has been exported.

Rejected experiments are not in the accepted source: moving PE6 down collided
with SPI clock copper; shifting Q_VBUS down collided with UART0_TX and R_PD_VSET.
The latter experiment was restored to accepted stage 10. The remaining three
drill sites are PE10's SoC fanout, USB_DP's SoC fanout, and the PD-status via
between Q_VBUS/C_PD_ADC. They need further local placement/fanout work, not
smaller drills, enlarged outlines, reduced clearances or ignored findings.

Remaining review work also includes Ethernet impedance/pairing, analog-path
exposure and DIR length, manufacturing silkscreen, 26 inherited module-profile
test failures, physical motor/harness fit, and hardware/Linux qualification.
The manufacturer's replacement-capacitor drawing was visually checked: the
same D-case pads fit. The 50 V rating is specified through 85 C, derating to
33.3 V at 125 C; verify local capacitor temperature, ripple and transients.

These fixes are a development revision, not fabrication approval. No fabrication
order has been placed. The acceptance summary is `reports/review-fix-status.json` together with
`reports/fix-regression.json` and `verification.json`. Older current-sense and
full-review JSON describe the pre-fix published checkpoint, not these edits.
Publication is tracked separately in `reports/review-fix-publication.json`.

Updated 2026-10-19. The targeted integration on restored v0.4.46 now has a
complete routed replay. Physical open joins decreased from 24 to **zero**.
The normal routed build succeeds; this is no longer a placement-only draft.
The original v0.4.46 release and recovery bundle remain available. The saved
current-sensing checkpoint was subsequently promoted to development latest at
the user's explicit request; see CHECKPOINT_SAVED.md and
`reports/current-sensing-promotion.json`. It remains not fabrication-ready.

## Historical full review at promotion (before the local fixes above)

`reports/full-board-review.json` records the review against this exact circuit.
Eight inherited nominal passive value/code mismatches and two wrong-package
Ethernet capacitor selections are confirmed in `reports/bom-value-review.json`.
The current reference selects 105 kohm rather than 9.1 kohm; four Ethernet
terminations select 47 kohm rather than 49.9 ohm. Stock-only checks missed them.
The 25 V motor bulk capacitor also lacks rating margin against the selected
TVS's 35.5 V clamping envelope. The additional DFM review finds two 0.116 mm
foreign SMD-pad gaps versus the published 0.15 mm rule. These are not repaired
or waived by the successful software checks below. No further electrical,
placement or routing change was made during this review.

## Published checkpoint hardware and routing (before review fixes)

- Ten additions: two 0.300 Ω inline winding shunts, two INA241B1 gain-10
  amplifiers, two supply bypasses and two 1 kΩ/100 nF ADC filters. Original
  DRV8825 regulation shunts, current presets and STEP circuitry are unchanged.
- Signed nominal output is VDDA/2 + 3 V/A; at 3.3 V, ±0.40 A corresponds
  to 0.45–2.85 V. MCU PA5/ADC5 and PB0/ADC8 receive the filtered signals.
- Both load trunks remain 0.30 mm on outer copper. Four independent Kelvin
  land-removal checks pass on the actual emitted metal, not just the netlist.
- Necessary analog/support leaves, the temperature cluster, status data,
  reference and DIR connections were manually rerouted. DIR now takes a longer
  multilayer path; its pins and firmware remain unchanged. The original SoC
  clock trees are retained exactly. No router engine was modified.
- Source placements are explicit in `current-sense-relayout.json`. Normal
  builds replay `routing/complete-routes.json` with the strict input-signature
  guard enabled. The accepted manual session is `routing/current-sense-staging.ses`,
  regenerated from `current-retained-base.ses`, `retained-sense-block.json` and
  `manual-closure.json`. `prepare-sense-base.py` documents the retained-copper cuts.
- 42.3 mm square, four layers, both assembly faces, four 3.5 mm mounting holes,
  screw envelopes, same-edge USB ports, Ethernet and top-side DRV8825 preserved.
  All 335 vias remain full L1–L4 through-vias, 0.30 mm drill / 0.45 mm pad.
- New bypasses use stocked C18164586, 100 nF / 16 V / X7R / 0201. Their CAD
  is explicitly a generic same-package illustration, not a CCTC-specific STEP.
  The inherited `R_ETH_SCLK` supplier-code mismatch was corrected to C106228
  without changing its specified 0 Ω value, 0201 footprint or connectivity.
- New bypass ground-tree limits are explicit (A: 8 mm, B: 3 mm), measured
  terminal-to-terminal; nearby ground stitching is also present. No original
  length constraint or clearance rule was disabled to obtain a build pass.

## Published checkpoint checks (before review fixes)

- Normal build: pass, **0 native error records**, **187 warnings** (baseline 175).
  Width warnings remain; all six motor-trunk source paths independently verify
  approximately 0.30 mm on outer layers. This is not a zero-warning claim.
- `tsci check`, CLI schematic-placement/style and TypeScript: pass.
- All-layer Gerber shorts: pass.
- Emitted-copper continuity: zero failed source connections, zero disconnected
  terminal islands. The check injects no saved/protected copper.
- Independent emitted pad/edge/NPTH/screw-land and 0.10 mm copper preflight:
  zero findings. All four emitted Kelvin land-removal tests: pass.
- 220 original components / 209 original nets are preserved when contracting
  only the two approved series shunts; the supplier correction is separately
  allowlisted and checked. No arbitrary net merges are permitted.
- Fresh JLC public-catalog audit: all 193 populated components / 80 unique
  codes cover five boards plus listed assembly losses/minimums. Stock is not
  reserved and must be checked again for an actual order.
- Current schematic and both PCB faces rendered and visually inspected.
  No new deployed website, cloud AI style or full enclosure review is claimed.

## Firmware and Linux workflow

The STM32 samples both ADC channels in foreground at nominal 1 kHz. The STEP
timer remains higher-priority and independent of Linux. Read-only command
`0x21` reports signed nominal mA, raw ADC counts, VDDA, validity/clipping flags
and sample age. Stale readings over 20 ms clear validity. It does not arm,
move, disable or refresh the heartbeat, including repeated requests/retries.
The existing `0x20` response and fault handling remain intact.

`python3 firmware/motor-control.py --current` reads the two channels; `--dry-run`
is available for packet inspection. See `firmware/PROTOCOL.md` for the format.
The controller firmware must match this hardware; unmodified v0.4.46 has no
inline telemetry amplifiers and must not treat its ADC readings as coil current.

Host C tests pass with address/undefined-behavior sanitizers and warnings as
errors. Tests cover conversion, clipping/invalid/stale data, tick wraparound,
watchdog isolation and existing pulse/fault behavior. Six Python decoder/CLI
tests pass, including successful and failed current queries issuing only the
read command. ARM cross-build succeeds (6400 bytes text,
8 bytes data, 736 bytes BSS). No board has been flashed or bench-tested here.

The separate reusable Linux-module/profile suite does **not** pass: 6 tests
pass and 26 fail. All 32 published module-runtime files are byte-identical to
the untouched v0.4.46 publish manifest. An isolated baseline run with the same
two test files and dependencies reproduces the exact same 26 failing cases;
there are zero added failures. These stored-routing/profile failures are not
waived or represented as passing. The actual carrier uses its parent-owned
complete replay and passes the emitted-copper checks above. See
`reports/module-test-regression.json` for the separate evidence.

## Remaining fabrication and hardware work

The independent 0.20 mm drill-to-foreign-track/land check still finds **202
deduplicated net/layer sites**, versus 208 in the saved v0.4.46 artifact. A
geometric baseline comparison finds **zero added violations**; existing
violations are not waived. The older per-segment audit lists 488 records
because native paths repeat the same copper. Do not confuse that count with
488 independent physical sites. See `reports/drill-clearance-regression.json`.

These inherited clearances require repair before fabrication signoff, even
though native DRC/shorts pass. Also outstanding are actual rear motor fastening,
harness/thermal/power bring-up and current offset/gain/PWM-noise qualification.
The telemetry is not true RMS and is not a current-protection loop. Native
warnings and the inherited module-suite failures still need review. The saved
checkpoint is now development latest; no fabrication order or hardware
validation has been performed. `reports/current-sense-status.json` binds the artifact,
replay, firmware binary and test logs by SHA-256.