README.md
# PD power supply v1.1.6 โ 0.3 mm drilled vias
Editable revision of [astra/pd-power-supply v1.1.3](https://tscircuit.com/astra/pd-power-supply). Every PCB via has a **0.3 mm drill**. Signal and logic vias use at least 0.6 mm copper pads; the eight dedicated load-path vias retain 0.8 mm pads. The PCB remains 80 ร 45 mm, four layers, 1.6 mm thick, with the original connector, dial, switch, mounting-hole and enclosure arrangement.
## Changes in this revision
- Render both USB-C receptacles with `<connector standard="usb_c" />`, canonical signal labels and four grounded shell pins. Preserve the exact stocked footprint and all PCB copper geometry.
- Replace both unavailable-to-preorder RK09K1110A0J controls with **ALPS RK09K1110AAR, JLC C3020619**. These retain 10 kฮฉ linear taper, horizontal orientation, 6 mm shaft diameter and 6.5 mm shaft-center height. Use knobs compatible with the new flat shaft. Its exact supplier footprint uses 2.5 mm signal-terminal pitch; trace endpoints are updated to match. The existing front enclosure apertures are retained after comparing the manufacturer drawing. Grip CAD represents clearance envelopes.
- Set minimum via drill/pad sizes explicitly and regenerate saved routing for the larger annuli. Dedicated 1.5 mm load-current paths and short 0.5 mm USB power escapes are preserved.
- Pin all 80 fitted components to one explicit JLC part number each (43 unique codes) in `parts.json`; include a dated primary JLC inventory snapshot and grouped assembly BOM.
- Replace the out-of-stock CH224Q C46061833 with **CH224A C42459160**, using its exact supplier footprint and model. WCH CH224DS1 v2.1 documents the shared CH224A/CH224Q I2C/PPS registers and addresses 0x22/0x23. The firmware API name `CH224Q` is retained for compatibility. The PD area is repositioned for the new package.
- Specify the fuse as **Littelfuse 046801.5NRHF, 1.5 A / 63 V, C151143**, rather than leaving supplier selection automatic.
- Specify the 10 ยตH logic inductor as **FXL0630-100-M, C167223**, with its exact supplier footprint; rated current 4.5 A, saturation current 5.5 A.
- Use stock-checked, voltage-rated input/output ceramics and concrete switch footprints. Replace the unavailable 230 kฮฉ feedback selection with 232 kฮฉ C22913; the nominal logic setpoint is approximately 3.32 V.
- Mark the PCB silkscreen `PD PPS / 1.1.4 / D0.3`.
## Files
- `board.circuit.tsx`: PCB entrypoint; `index.circuit.tsx`: board plus enclosure/display/grips.
- `parts.json`, `parts.ts`: explicit supplier selections.
- `routing/board-routes.json`: reproducible signal/logic routes; power routes remain authored in TSX.
- `bom.csv`: grouped JLC assembly BOM; `stock-report.md`, `stock-report.csv`, `stock-snapshot.json`: inventory evidence, quantities and source links.
- `board-review.html`: self-contained interactive PCB review; `review.html`: assembly review.
- `dist/board/circuit.json`, `dist/index/circuit.json`: generated circuit records.
- `fabrication/`: board fabrication exports and placement data.
- `firmware/`: RP2040 MicroPython prototype control firmware.
## Stock status
All 43 selected codes showed positive JLC inventory **and enough preorder availability for one board** in the refreshed October 1, 2026 (Pacific) check. See `stock-report.md` for UTC timestamps, counts and direct links. The new C3020619 pots showed 533 in inventory and 524 available to preorder. The LTC3115-2 C684130 showed 18 in inventory; the C221660 switch showed 216 in inventory and one available to preorder. Inventory is a snapshot and is not reserved; check counts for larger batches.
## Build and verification
```sh
npm ci --ignore-scripts
node scripts/patch-copper-geometry.cjs
npm run build
npm run typecheck
npm test
npm run review
```
The geometry patch omits only zero-radius synthetic holes requested by the dependency's copper-connectivity checker, while retaining every real drill. It fails if the dependency's expected source changes. This avoids an asynchronous DRC exception in the pinned toolchain. `verify-revision.cjs` checks both entrypoints for zero generated errors, 0.3 mm drills, adequate annuli and the exact stock-checked supplier selections with preorder availability. Netlist and power-copper audits check the existing electrical topology and generated current-path widths. Seven host firmware tests exercise register writes, addresses, voltage bounds, capability parsing and dial/debounce behavior.
## Electrical behavior and prototype limitations
PWR VBUS โ 1.5 A fuse โ TPS259470A eFuse โ 50 mฮฉ current shunt โ WAGO output. The output target remains 1 A total. The C&K SMD slide switch controls eFuse enable; it does not carry load current. DATA USB can power the logic through the diode OR but does not feed the output. LTC3115-2 supplies the logic rail. The CH224A negotiates USB-PD PPS; coarse and fine dials request 3.3โ20 V in 100 mV register steps when supported by the connected adapter. This circuit does not implement a precision adjustable constant-current mode.
Flash RP2040 MicroPython for 2 MB flash / 12 MHz crystal and copy `firmware/main.py` and `firmware/pd_control.py`. Hold BOOT and pulse RESET for USB boot. The internal JST-PH display connector uses pin order 1 GND, 2 3.3 V, 3 SCL, 4 SDA. The existing 6.8 kฮฉ PD strap retains a 9 V boot profile; firmware requests 5 V at initialization. Check the measured voltage before enabling a load. The capability parser must still be validated against a physical adapter's CH224A SRCCAP register dump.
This is an engineering prototype. Generated DRC and host tests do not establish switching-loop stability, thermal performance, EMI, USB signal integrity, supplier centroid/paste correctness or enclosure fit. Verify those on the assembled prototype before deployment. Manufacturing drills also include the original component and mounting holes; the 0.3 mm requirement applies to vias.
## References
- [ALPS RK09K1110AAR dimensions, pinout and specifications](https://tech.alpsalpine.com/e/products/detail/RK09K1110AAR/), [JLC C3020619](https://jlcpcb.com/partdetail/C3020619).
- [WCH CH224 family](https://www.wch.cn/products/CH224.html), [CH224DS1 v2.1 PDF](https://datasheet.lcsc.com/datasheet/pdf/4f12eebccb4eda2c0038806df0155265.pdf).
- [LTC3115-2 datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/LTC3115-2.pdf).
- [TPS25947 datasheet](https://www.ti.com/lit/ds/symlink/tps25947.pdf).
- [RP2040 hardware design guide](https://datasheets.raspberrypi.com/rp2040/hardware-design-with-rp2040.pdf).
- [INA219 datasheet](https://www.ti.com/lit/ds/symlink/ina219.pdf).