# Compact ESP8684 PIR — native Pipeline9 development revision
**Development revision — do not fabricate.** Pipeline9 completes routing, but the strict build fails DRC: GPIO0/GPIO1 copper overlaps and has less than 0.10 mm clearance. Independent KiCad DRC confirms shorts on that pair. See `validation/` for the actual failure reports.
29 × 25 mm, **two copper layers**, ESP8684H4X, S18-L262B-2 PIR, and two 10-pin male headers. `index.circuit.tsx` is the executable entry point. It enables tscircuit's native Pipeline9 autorouter and routes remaining connections during a build. The source retains explicit RF/crystal paths. No Freerouting, imported route snapshot, custom algorithm function, or saved route cache is embedded in this project.
## Build
```sh
bun install
bun run build # strict DRC; currently exits nonzero
bun run preview # view the failed routing, keeping error records
```
The build runs `tsci build index.circuit.tsx` with routing enabled. `schAutoLayoutEnabled` remains enabled; there are no manually placed component schematic coordinates. `dist/index/circuit.json` is generated by that TSX build and is supplied for preview/inspection.
## Hardware and firmware
Use a protected 1S LiPo, maximum 4.2 V, on BAT/GND. Use a 3.3 V USB–UART adapter for programming; the MCU has no native USB connector here. Firmware and complete flashing instructions are in `firmware/README.md`. The binary remains the previously compiled ESP-IDF motion application: GPIO2 reads the PIR, GPIO7 drives the LED transistor, startup settling is 60 seconds, and LED hold is 10 seconds after the last HIGH PIR input.
Connect the external indicator LED anode to LED+ and cathode to LED−. LED+ includes the onboard 150 Ω resistor. LED− is the transistor's switched cathode, not GND. GPIO2 is sensor-driven and must remain an input; GPIO7 is shared with LED control. Fit a separate SB-F-11 Fresnel lens and an external 2.4 GHz U.FL antenna before enabling wireless. The supplied firmware does not enable its radios.
This routing revision has not been physically built or tested. Earlier factory files and manufacturing validation describe revision 1.0.1; they are not included as fabrication outputs for this native routing revision. Exact supplier selections remain in `parts/selection.json`; stock snapshots are dated 2026-10-24 and do not reserve stock.
## Validation
- Typecheck and netlist checks complete.
- PCB placement: zero errors and warnings.
- Source pin connections and two-layer geometry match the preceding electrical design; no foreign bottom copper enters the protected RF/crystal regions.
- Strict build: **fails** the GPIO0/GPIO1 copper-clearance check. Native KiCad confirms physical shorts, so source-netlist agreement does not mean this routed PCB is electrically safe.
- The schematic's automatic layout retains a decoupling-capacitor spacing advisory.
- `bun run preview` deliberately keeps a viewable result despite DRC errors. Its zero exit status must not be treated as manufacturing validation. `bun run build` remains strict.
Reproduce the independent geometry/netlist report with `python3 validation/check-native-geometry.py dist/index/circuit.json --reference validation/reference-source-netlist.json`. Native KiCad reports are included for inspection; they do not approve fabrication.