krishnax12/watchy-eink-smartwatch

Unfinished prototype (not production-ready): 4 native DRC errors, 2 display-flex intersections, and missing antenna radiator copper remain

Version
1.2.7
License
MIT
Stars
1

reports/routing-validation.json

{
  "circuitPath": "dist/index/circuit.json",
  "connectivityPreserved": true,
  "nets": 53,
  "connectedPins": 237,
  "traces": 184,
  "vias": 166,
  "routed": true,
  "errors": [
    {
      "type": "pcb_trace_too_long_error",
      "pcb_trace_too_long_error_id": "pcb_trace_too_long_error_0",
      "error_type": "pcb_trace_too_long_error",
      "message": "PCB trace is 11.54mm long, exceeding the 10mm maximum",
      "pcb_trace_id": "source_trace_1_mst0_0",
      "source_trace_id": "source_trace_1",
      "actual_trace_length": 11.544172735478213,
      "maximum_trace_length": 10,
      "subcircuit_id": "subcircuit_source_group_0"
    },
    {
      "type": "pcb_trace_error",
      "pcb_trace_error_id": "pcb_trace_error_0",
      "error_type": "pcb_trace_error",
      "message": "PCB trace uses 2 vias, exceeding the 0 maximum",
      "pcb_trace_id": "source_trace_0_mst0_0",
      "source_trace_id": "source_trace_0",
      "pcb_component_ids": [
        "pcb_component_4",
        "pcb_component_19",
        "pcb_component_27"
      ],
      "pcb_port_ids": [
        "pcb_port_8",
        "pcb_port_89",
        "pcb_port_103"
      ],
      "subcircuit_id": "subcircuit_source_group_0"
    },
    {
      "type": "pcb_trace_error",
      "pcb_trace_error_id": "pcb_trace_error_1",
      "error_type": "pcb_trace_error",
      "message": "PCB trace uses 2 vias, exceeding the 0 maximum",
      "pcb_trace_id": "source_trace_1_mst0_0",
      "source_trace_id": "source_trace_1",
      "pcb_component_ids": [
        "pcb_component_4",
        "pcb_component_8",
        "pcb_component_20"
      ],
      "pcb_port_ids": [
        "pcb_port_9",
        "pcb_port_63",
        "pcb_port_91"
      ],
      "subcircuit_id": "subcircuit_source_group_0"
    },
    {
      "type": "pcb_placement_error",
      "pcb_placement_error_id": "pcb_placement_error_0",
      "error_type": "pcb_placement_error",
      "message": "Via pcb_via_19 violates copper-to-board-edge clearance (measured 0.158mm, required 0.200mm)"
    }
  ],
  "routingConstraintErrors": [
    "RF_ANT violates the required top-only, no-via routing rule",
    "XTAL_40M_FB violates the required top-only, no-via routing rule",
    "XTAL_40M_OUT violates the required top-only, no-via routing rule"
  ],
  "warningCount": 38
}