imrishabh18/rp2040-motor-controller

reports/pg-sense-2026-10-22/full-tests.log

bun test v1.3.14 (0d9b296a)

tests/temperature-telemetry.test.tsx:
(pass) temperature uses I2C only; ALERT/GPIO24 are disconnected and MCU/PD enable is retained [25.48ms]

tests/nema17-mechanical.test.tsx:
(pass) NEMA 17 perimeter, four mounting drills and shared ground are preserved [9796.45ms]

tests/schematic-style.test.tsx:
(pass) automatic schematic refinement clears all style issues on all sheets [9556.60ms]

tests/preview-renderer.test.ts:
(pass) preview preserves separated runs when an inner layer is revisited through vias [5.07ms]
(pass) preview keeps layer changes and through-pad markers as run boundaries [1.24ms]
(pass) preview preserves widths, pour flags, interpolation and source geometry without mutation [1.69ms]
(pass) full board selected-layer strokes match complete routes on all four copper layers [30.72ms]
(pass) the screenshot's phantom AVDD diagonal is absent from the patched actual-board drawing [8.20ms]
(pass) via drill clearing stays restricted to actual runs on the selected layer [3.46ms]

tests/pd-power-good.test.tsx:
(pass) PG reads on GPIO7 without joining USB supply domains or bypassing the sleep interlock [9466.58ms]

tests/board.test.tsx:
(pass) renders the complete RP2040 stepper-motor controller [2961.61ms]

tests/automatic-schematic-layout.test.ts:
(pass) components and layout groups have no schematic coordinates [7.84ms]
(pass) measured group packing uses the space below small groups without overlap [0.17ms]

tests/outer-motor-power.test.tsx:
(pass) motor supply, winding and regulation-return copper stays on outer layers [23.33ms]

tests/schematic-sheets.test.tsx:
(pass) renders ten readable schematic sheets with local component groups [10480.14ms]

tests/drv8825-thermal-vias.test.tsx:
(pass) DRV8825 preserves all twelve supplier thermal vias, grounded through EP [11.17ms]

tests/saved-routing.test.ts:
(pass) saved routing refuses moved terminals, changed connections and changed clearances [106.78ms]
(pass) saved routing supplies a fresh copy of the complete route geometry [17.75ms]
(pass) saved routing accepts deduplicated connectivity IDs from newer core [19.18ms]
(pass) saved routing still rejects changed obstacle connectivity [87.75ms]

tests/pd-voltage-control.test.tsx:
(pass) PD selection uses the correct physical pins and isolates the USB power domains [10400.12ms]

tests/feedback.test.tsx:
(pass) optional bottom encoder, buzzer switching/flyback and low-profile motor capacitor [102.34ms]

tests/ground-pour-selection.test.ts:
(pass) only the independently audited floating copper is removed [0.27ms]
(pass) changed copper geometry, layer, net or count requires a fresh ground audit [0.10ms]
(pass) placement-only CLI renders still run normal DRC without applying a routed-pour selection [0.06ms]

tests/drv8825.test.tsx:
(pass) DRV8825 physical pins, isolated reference, microstep mode and charge pump [9986.53ms]

tests/pd-bus-voltage-monitor.test.tsx:
(pass) raw PD VBUS measurement is isolated from 3.3 V, DATA USB, and protected motor rail [12976.40ms]

tests/current-telemetry.test.tsx:
(pass) two inline current sensors, safe ADC nets, RGB and separate power domains [11074.85ms]
(pass) each sense lead terminates directly at its shunt pad without a via [11575.96ms]

tests/jlcpcb-stock-audit.test.ts:
(pass) keeps displayed stock separate from available order quantity [1.00ms]
(pass) ignores price records and other suggested components [0.06ms]
(pass) reassembles records split between script chunks [0.03ms]
(pass) fails closed instead of assuming missing stock means available [0.18ms]

tests/common-ground.test.tsx:
(pass) all grounds and mounting rings share connectivity; a missing ground connection is detected [9840.49ms]

 34 pass
 0 fail
 4490 expect() calls
Ran 34 tests across 19 files. [109.49s]