hrithik18k/metal-touch-panel

A PCB autorouting wrapper that corrects footprint-trace obstacle dimensions, solves routes with a preloaded trace-graph solver, and reports completed traces or routing errors.

Version
1.0.0
License
unset
Stars
0

evidence/repro-via-clearance/result.json

[
  {
    "type": "source_group",
    "source_group_id": "source_group_0",
    "is_subcircuit": true,
    "was_automatically_named": true,
    "subcircuit_id": "subcircuit_source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_0",
    "name": "SCL",
    "pin_number": 1,
    "port_hints": [
      "SCL",
      "pin1",
      "1"
    ],
    "source_component_id": "source_component_0",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_1",
    "name": "SDA",
    "pin_number": 2,
    "port_hints": [
      "SDA",
      "pin2",
      "2"
    ],
    "source_component_id": "source_component_0",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_2",
    "name": "CLKIN",
    "pin_number": 3,
    "port_hints": [
      "CLKIN",
      "pin3",
      "3"
    ],
    "source_component_id": "source_component_0",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_3",
    "name": "ADDR",
    "pin_number": 4,
    "port_hints": [
      "ADDR",
      "pin4",
      "4"
    ],
    "source_component_id": "source_component_0",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_4",
    "name": "INTB",
    "pin_number": 5,
    "port_hints": [
      "INTB",
      "pin5",
      "5"
    ],
    "source_component_id": "source_component_0",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_5",
    "name": "SD",
    "pin_number": 6,
    "port_hints": [
      "SD",
      "pin6",
      "6"
    ],
    "source_component_id": "source_component_0",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_6",
    "name": "VDD",
    "pin_number": 7,
    "port_hints": [
      "VDD",
      "pin7",
      "7"
    ],
    "source_component_id": "source_component_0",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_7",
    "name": "GND",
    "pin_number": 8,
    "port_hints": [
      "GND",
      "pin8",
      "8"
    ],
    "source_component_id": "source_component_0",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_8",
    "name": "IN0A",
    "pin_number": 9,
    "port_hints": [
      "IN0A",
      "pin9",
      "9"
    ],
    "source_component_id": "source_component_0",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_9",
    "name": "IN0B",
    "pin_number": 10,
    "port_hints": [
      "IN0B",
      "pin10",
      "10"
    ],
    "source_component_id": "source_component_0",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_10",
    "name": "IN1A",
    "pin_number": 11,
    "port_hints": [
      "IN1A",
      "pin11",
      "11"
    ],
    "source_component_id": "source_component_0",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_11",
    "name": "IN1B",
    "pin_number": 12,
    "port_hints": [
      "IN1B",
      "pin12",
      "12"
    ],
    "source_component_id": "source_component_0",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_12",
    "name": "IN2A",
    "pin_number": 13,
    "port_hints": [
      "IN2A",
      "pin13",
      "13"
    ],
    "source_component_id": "source_component_0",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_13",
    "name": "IN2B",
    "pin_number": 14,
    "port_hints": [
      "IN2B",
      "pin14",
      "14"
    ],
    "source_component_id": "source_component_0",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_14",
    "name": "IN3A",
    "pin_number": 15,
    "port_hints": [
      "IN3A",
      "pin15",
      "15"
    ],
    "source_component_id": "source_component_0",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_15",
    "name": "IN3B",
    "pin_number": 16,
    "port_hints": [
      "IN3B",
      "pin16",
      "16"
    ],
    "source_component_id": "source_component_0",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_16",
    "name": "EP",
    "pin_number": 17,
    "port_hints": [
      "EP",
      "pin17",
      "17"
    ],
    "source_component_id": "source_component_0",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_0",
    "ftype": "simple_chip",
    "name": "U1",
    "manufacturer_part_number": "LDC1614RGHR",
    "supplier_part_numbers": {
      "jlcpcb": [
        "C968448"
      ]
    },
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_17",
    "name": "pin1",
    "pin_number": 1,
    "port_hints": [
      "pin1",
      "anode",
      "pos",
      "1",
      "left"
    ],
    "source_component_id": "source_component_1",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_18",
    "name": "pin2",
    "pin_number": 2,
    "port_hints": [
      "pin2",
      "cathode",
      "neg",
      "2",
      "right"
    ],
    "source_component_id": "source_component_1",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_1",
    "ftype": "simple_capacitor",
    "name": "C5",
    "supplier_part_numbers": {
      "jlcpcb": [
        "C14663",
        "C1591",
        "C282519"
      ]
    },
    "capacitance": 1e-7,
    "display_capacitance": "100nF",
    "are_pins_interchangeable": true,
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_19",
    "name": "pin1",
    "pin_number": 1,
    "port_hints": [
      "pin1",
      "anode",
      "pos",
      "1",
      "left"
    ],
    "source_component_id": "source_component_2",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_20",
    "name": "pin2",
    "pin_number": 2,
    "port_hints": [
      "pin2",
      "cathode",
      "neg",
      "2",
      "right"
    ],
    "source_component_id": "source_component_2",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_2",
    "ftype": "simple_capacitor",
    "name": "C6",
    "supplier_part_numbers": {
      "jlcpcb": [
        "C15849",
        "C6119852",
        "C29936"
      ]
    },
    "capacitance": 0.000001,
    "display_capacitance": "1uF",
    "are_pins_interchangeable": true,
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_21",
    "name": "pin1",
    "pin_number": 1,
    "port_hints": [
      "pin1",
      "anode",
      "pos",
      "left",
      "1"
    ],
    "source_component_id": "source_component_3",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_22",
    "name": "pin2",
    "pin_number": 2,
    "port_hints": [
      "pin2",
      "cathode",
      "neg",
      "right",
      "2"
    ],
    "source_component_id": "source_component_3",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_3",
    "ftype": "simple_resistor",
    "name": "R1",
    "supplier_part_numbers": {
      "jlcpcb": [
        "C23162",
        "C2907166",
        "C99782"
      ]
    },
    "resistance": 4700,
    "display_resistance": "4.7kΩ",
    "are_pins_interchangeable": true,
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_23",
    "name": "pin1",
    "pin_number": 1,
    "port_hints": [
      "pin1",
      "anode",
      "pos",
      "left",
      "1"
    ],
    "source_component_id": "source_component_4",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_24",
    "name": "pin2",
    "pin_number": 2,
    "port_hints": [
      "pin2",
      "cathode",
      "neg",
      "right",
      "2"
    ],
    "source_component_id": "source_component_4",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_4",
    "ftype": "simple_resistor",
    "name": "R2",
    "supplier_part_numbers": {
      "jlcpcb": [
        "C23162",
        "C2907166",
        "C99782"
      ]
    },
    "resistance": 4700,
    "display_resistance": "4.7kΩ",
    "are_pins_interchangeable": true,
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_25",
    "name": "pin1",
    "pin_number": 1,
    "port_hints": [
      "pin1",
      "1"
    ],
    "source_component_id": "source_component_5",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_26",
    "name": "pin2",
    "pin_number": 2,
    "port_hints": [
      "pin2",
      "2"
    ],
    "source_component_id": "source_component_5",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_27",
    "name": "pin3",
    "pin_number": 3,
    "port_hints": [
      "pin3",
      "3"
    ],
    "source_component_id": "source_component_5",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_28",
    "name": "pin4",
    "pin_number": 4,
    "port_hints": [
      "pin4",
      "4"
    ],
    "source_component_id": "source_component_5",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_29",
    "name": "pin5",
    "pin_number": 5,
    "port_hints": [
      "pin5",
      "5"
    ],
    "source_component_id": "source_component_5",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_5",
    "ftype": "simple_pin_header",
    "name": "J1",
    "supplier_part_numbers": {
      "jlcpcb": [
        "C492404",
        "C492413",
        "C358687"
      ]
    },
    "pin_count": 5,
    "gender": "male",
    "are_pins_interchangeable": true,
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_30",
    "name": "pin1",
    "pin_number": 1,
    "port_hints": [
      "pin1",
      "anode",
      "pos",
      "left",
      "1"
    ],
    "source_component_id": "source_component_6",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_31",
    "name": "pin2",
    "pin_number": 2,
    "port_hints": [
      "pin2",
      "cathode",
      "neg",
      "right",
      "2"
    ],
    "source_component_id": "source_component_6",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_6",
    "name": "L1",
    "ftype": "simple_inductor",
    "inductance": "3uH",
    "display_inductance": "3µH",
    "supplier_part_numbers": {
      "jlcpcb": []
    },
    "are_pins_interchangeable": true,
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_32",
    "name": "pin1",
    "pin_number": 1,
    "port_hints": [
      "pin1",
      "anode",
      "pos",
      "1",
      "left"
    ],
    "source_component_id": "source_component_7",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_33",
    "name": "pin2",
    "pin_number": 2,
    "port_hints": [
      "pin2",
      "cathode",
      "neg",
      "2",
      "right"
    ],
    "source_component_id": "source_component_7",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_7",
    "ftype": "simple_capacitor",
    "name": "C1",
    "supplier_part_numbers": {
      "jlcpcb": [
        "C1588",
        "C100040",
        "C5375733"
      ]
    },
    "capacitance": 1e-9,
    "display_capacitance": "1nF",
    "are_pins_interchangeable": true,
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_34",
    "name": "pin1",
    "pin_number": 1,
    "port_hints": [
      "pin1",
      "anode",
      "pos",
      "left",
      "1"
    ],
    "source_component_id": "source_component_8",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_35",
    "name": "pin2",
    "pin_number": 2,
    "port_hints": [
      "pin2",
      "cathode",
      "neg",
      "right",
      "2"
    ],
    "source_component_id": "source_component_8",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_8",
    "name": "L2",
    "ftype": "simple_inductor",
    "inductance": "3uH",
    "display_inductance": "3µH",
    "supplier_part_numbers": {
      "jlcpcb": []
    },
    "are_pins_interchangeable": true,
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_36",
    "name": "pin1",
    "pin_number": 1,
    "port_hints": [
      "pin1",
      "anode",
      "pos",
      "1",
      "left"
    ],
    "source_component_id": "source_component_9",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_37",
    "name": "pin2",
    "pin_number": 2,
    "port_hints": [
      "pin2",
      "cathode",
      "neg",
      "2",
      "right"
    ],
    "source_component_id": "source_component_9",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_9",
    "ftype": "simple_capacitor",
    "name": "C2",
    "supplier_part_numbers": {
      "jlcpcb": [
        "C1588",
        "C100040",
        "C5375733"
      ]
    },
    "capacitance": 1e-9,
    "display_capacitance": "1nF",
    "are_pins_interchangeable": true,
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_38",
    "name": "pin1",
    "pin_number": 1,
    "port_hints": [
      "pin1",
      "anode",
      "pos",
      "left",
      "1"
    ],
    "source_component_id": "source_component_10",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_39",
    "name": "pin2",
    "pin_number": 2,
    "port_hints": [
      "pin2",
      "cathode",
      "neg",
      "right",
      "2"
    ],
    "source_component_id": "source_component_10",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_10",
    "name": "L3",
    "ftype": "simple_inductor",
    "inductance": "3uH",
    "display_inductance": "3µH",
    "supplier_part_numbers": {
      "jlcpcb": []
    },
    "are_pins_interchangeable": true,
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_40",
    "name": "pin1",
    "pin_number": 1,
    "port_hints": [
      "pin1",
      "anode",
      "pos",
      "1",
      "left"
    ],
    "source_component_id": "source_component_11",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_41",
    "name": "pin2",
    "pin_number": 2,
    "port_hints": [
      "pin2",
      "cathode",
      "neg",
      "2",
      "right"
    ],
    "source_component_id": "source_component_11",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_11",
    "ftype": "simple_capacitor",
    "name": "C3",
    "supplier_part_numbers": {
      "jlcpcb": [
        "C1588",
        "C100040",
        "C5375733"
      ]
    },
    "capacitance": 1e-9,
    "display_capacitance": "1nF",
    "are_pins_interchangeable": true,
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_42",
    "name": "pin1",
    "pin_number": 1,
    "port_hints": [
      "pin1",
      "anode",
      "pos",
      "left",
      "1"
    ],
    "source_component_id": "source_component_12",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_43",
    "name": "pin2",
    "pin_number": 2,
    "port_hints": [
      "pin2",
      "cathode",
      "neg",
      "right",
      "2"
    ],
    "source_component_id": "source_component_12",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_12",
    "name": "L4",
    "ftype": "simple_inductor",
    "inductance": "3uH",
    "display_inductance": "3µH",
    "supplier_part_numbers": {
      "jlcpcb": []
    },
    "are_pins_interchangeable": true,
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_44",
    "name": "pin1",
    "pin_number": 1,
    "port_hints": [
      "pin1",
      "anode",
      "pos",
      "1",
      "left"
    ],
    "source_component_id": "source_component_13",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
  },
  {
    "type": "source_port",
    "source_port_id": "source_port_45",
    "name": "pin2",
    "pin_number": 2,
    "port_hints": [
      "pin2",
      "cathode",
      "neg",
      "2",
      "right"
    ],
    "source_component_id": "source_component_13",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
  },
  {
    "type": "source_component",
    "source_component_id": "source_component_13",
    "ftype": "simple_capacitor",
    "name": "C4",
    "supplier_part_numbers": {
      "jlcpcb": [
        "C1588",
        "C100040",
        "C5375733"
      ]
    },
    "capacitance": 1e-9,
    "display_capacitance": "1nF",
    "are_pins_interchangeable": true,
    "source_group_id": "source_group_0"
  },
  {
    "type": "source_net",
    "source_net_id": "source_net_0",
    "name": "GND",
    "member_source_group_ids": [],
    "is_ground": true,
    "is_power": false,
    "is_positive_voltage_source": false,
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
  },
  {
    "type": "source_net",
    "source_net_id": "source_net_1",
    "name": "V3V3",
    "member_source_group_ids": [],
    "is_ground": false,
    "is_power": true,
    "is_positive_voltage_source": true,
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
  },
  {
    "type": "source_board",
    "source_board_id": "source_board_0",
    "source_group_id": "source_group_0",
    "title": "Metal Touch / 4-channel LDC1614"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_0",
    "connected_source_port_ids": [
      "source_port_8",
      "source_port_30"
    ],
    "connected_source_net_ids": [],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "U1.IN0A to L1.pin1",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_0",
    "message": "<trace#99(from:U1.IN0A to:L1.pin1) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_0",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_1",
    "connected_source_port_ids": [
      "source_port_9",
      "source_port_31"
    ],
    "connected_source_net_ids": [],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "U1.IN0B to L1.pin2",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_1",
    "message": "<trace#100(from:U1.IN0B to:L1.pin2) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_1",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_2",
    "connected_source_port_ids": [
      "source_port_32",
      "source_port_30"
    ],
    "connected_source_net_ids": [],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "C1.pin1 to L1.pin1",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_2",
    "message": "<trace#101(from:C1.pin1 to:L1.pin1) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_2",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_3",
    "connected_source_port_ids": [
      "source_port_33",
      "source_port_31"
    ],
    "connected_source_net_ids": [],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "C1.pin2 to L1.pin2",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_3",
    "message": "<trace#102(from:C1.pin2 to:L1.pin2) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_3",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_4",
    "connected_source_port_ids": [
      "source_port_10",
      "source_port_34"
    ],
    "connected_source_net_ids": [],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "U1.IN1A to L2.pin1",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_4",
    "message": "<trace#119(from:U1.IN1A to:L2.pin1) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_4",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_5",
    "connected_source_port_ids": [
      "source_port_11",
      "source_port_35"
    ],
    "connected_source_net_ids": [],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "U1.IN1B to L2.pin2",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_5",
    "message": "<trace#120(from:U1.IN1B to:L2.pin2) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_5",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_6",
    "connected_source_port_ids": [
      "source_port_36",
      "source_port_34"
    ],
    "connected_source_net_ids": [],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "C2.pin1 to L2.pin1",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_6",
    "message": "<trace#121(from:C2.pin1 to:L2.pin1) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_6",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_7",
    "connected_source_port_ids": [
      "source_port_37",
      "source_port_35"
    ],
    "connected_source_net_ids": [],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "C2.pin2 to L2.pin2",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_7",
    "message": "<trace#122(from:C2.pin2 to:L2.pin2) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_7",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_8",
    "connected_source_port_ids": [
      "source_port_12",
      "source_port_38"
    ],
    "connected_source_net_ids": [],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "U1.IN2A to L3.pin1",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_8",
    "message": "<trace#139(from:U1.IN2A to:L3.pin1) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_8",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_9",
    "connected_source_port_ids": [
      "source_port_13",
      "source_port_39"
    ],
    "connected_source_net_ids": [],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "U1.IN2B to L3.pin2",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_9",
    "message": "<trace#140(from:U1.IN2B to:L3.pin2) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_9",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_10",
    "connected_source_port_ids": [
      "source_port_40",
      "source_port_38"
    ],
    "connected_source_net_ids": [],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "C3.pin1 to L3.pin1",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_10",
    "message": "<trace#141(from:C3.pin1 to:L3.pin1) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_10",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_11",
    "connected_source_port_ids": [
      "source_port_41",
      "source_port_39"
    ],
    "connected_source_net_ids": [],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "C3.pin2 to L3.pin2",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_11",
    "message": "<trace#142(from:C3.pin2 to:L3.pin2) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_11",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_12",
    "connected_source_port_ids": [
      "source_port_14",
      "source_port_42"
    ],
    "connected_source_net_ids": [],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "U1.IN3A to L4.pin1",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_12",
    "message": "<trace#159(from:U1.IN3A to:L4.pin1) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_12",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_13",
    "connected_source_port_ids": [
      "source_port_15",
      "source_port_43"
    ],
    "connected_source_net_ids": [],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "U1.IN3B to L4.pin2",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_13",
    "message": "<trace#160(from:U1.IN3B to:L4.pin2) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_13",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_14",
    "connected_source_port_ids": [
      "source_port_44",
      "source_port_42"
    ],
    "connected_source_net_ids": [],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "C4.pin1 to L4.pin1",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_14",
    "message": "<trace#161(from:C4.pin1 to:L4.pin1) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_14",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_15",
    "connected_source_port_ids": [
      "source_port_45",
      "source_port_43"
    ],
    "connected_source_net_ids": [],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "C4.pin2 to L4.pin2",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_15",
    "message": "<trace#162(from:C4.pin2 to:L4.pin2) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_15",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_16",
    "connected_source_port_ids": [
      "source_port_7"
    ],
    "connected_source_net_ids": [
      "source_net_0"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "U1.GND to net.GND",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_17",
    "connected_source_port_ids": [
      "source_port_16"
    ],
    "connected_source_net_ids": [
      "source_net_0"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "U1.EP to net.GND",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_18",
    "connected_source_port_ids": [
      "source_port_2"
    ],
    "connected_source_net_ids": [
      "source_net_0"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "U1.CLKIN to net.GND",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_19",
    "connected_source_port_ids": [
      "source_port_3"
    ],
    "connected_source_net_ids": [
      "source_net_0"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "U1.ADDR to net.GND",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_20",
    "connected_source_port_ids": [
      "source_port_5"
    ],
    "connected_source_net_ids": [
      "source_net_0"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "U1.SD to net.GND",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_21",
    "connected_source_port_ids": [
      "source_port_18"
    ],
    "connected_source_net_ids": [
      "source_net_0"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "C5.pin2 to net.GND",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_22",
    "connected_source_port_ids": [
      "source_port_20"
    ],
    "connected_source_net_ids": [
      "source_net_0"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "C6.pin2 to net.GND",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_23",
    "connected_source_port_ids": [
      "source_port_26"
    ],
    "connected_source_net_ids": [
      "source_net_0"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "J1.pin2 to net.GND",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_24",
    "connected_source_port_ids": [
      "source_port_6"
    ],
    "connected_source_net_ids": [
      "source_net_1"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "U1.VDD to net.V3V3",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_25",
    "connected_source_port_ids": [
      "source_port_17"
    ],
    "connected_source_net_ids": [
      "source_net_1"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "C5.pin1 to net.V3V3",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_26",
    "connected_source_port_ids": [
      "source_port_19"
    ],
    "connected_source_net_ids": [
      "source_net_1"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "C6.pin1 to net.V3V3",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_27",
    "connected_source_port_ids": [
      "source_port_21"
    ],
    "connected_source_net_ids": [
      "source_net_1"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "R1.pin1 to net.V3V3",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_28",
    "connected_source_port_ids": [
      "source_port_23"
    ],
    "connected_source_net_ids": [
      "source_net_1"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "R2.pin1 to net.V3V3",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_29",
    "connected_source_port_ids": [
      "source_port_25"
    ],
    "connected_source_net_ids": [
      "source_net_1"
    ],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "J1.pin1 to net.V3V3",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_30",
    "connected_source_port_ids": [
      "source_port_0",
      "source_port_28"
    ],
    "connected_source_net_ids": [],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "U1.SCL to J1.pin4",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_16",
    "message": "<trace#178(from:U1.SCL to:J1.pin4) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_30",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_31",
    "connected_source_port_ids": [
      "source_port_1",
      "source_port_27"
    ],
    "connected_source_net_ids": [],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "U1.SDA to J1.pin3",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_17",
    "message": "<trace#179(from:U1.SDA to:J1.pin3) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_31",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_32",
    "connected_source_port_ids": [
      "source_port_22",
      "source_port_0"
    ],
    "connected_source_net_ids": [],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "R1.pin2 to U1.SCL",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_18",
    "message": "<trace#180(from:R1.pin2 to:U1.SCL) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_32",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_33",
    "connected_source_port_ids": [
      "source_port_24",
      "source_port_1"
    ],
    "connected_source_net_ids": [],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "R2.pin2 to U1.SDA",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_19",
    "message": "<trace#181(from:R2.pin2 to:U1.SDA) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_33",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "source_trace",
    "source_trace_id": "source_trace_34",
    "connected_source_port_ids": [
      "source_port_4",
      "source_port_29"
    ],
    "connected_source_net_ids": [],
    "subcircuit_id": "subcircuit_source_group_0",
    "display_name": "U1.INTB to J1.pin5",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
  },
  {
    "type": "source_unnamed_trace_warning",
    "source_unnamed_trace_warning_id": "source_unnamed_trace_warning_20",
    "message": "<trace#182(from:U1.INTB to:J1.pin5) /> is missing a name. Add a name prop to make the trace easier to identify.",
    "source_trace_id": "source_trace_34",
    "subcircuit_id": "subcircuit_source_group_0",
    "warning_type": "source_unnamed_trace_warning"
  },
  {
    "type": "schematic_component",
    "schematic_component_id": "schematic_component_0",
    "center": {
      "x": 0,
      "y": 0
    },
    "rotation": 0,
    "size": {
      "width": 1.2000000000000002,
      "height": 1.8
    },
    "pin_spacing": 0.2,
    "port_labels": {
      "pin1": "SCL",
      "pin2": "SDA",
      "pin3": "CLKIN",
      "pin4": "ADDR",
      "pin5": "INTB",
      "pin6": "SD",
      "pin7": "VDD",
      "pin8": "GND",
      "pin9": "IN0A",
      "pin10": "IN0B",
      "pin11": "IN1A",
      "pin12": "IN1B",
      "pin13": "IN2A",
      "pin14": "IN2B",
      "pin15": "IN3A",
      "pin16": "IN3B",
      "pin17": "EP"
    },
    "source_component_id": "source_component_0",
    "schematic_group_id": "schematic_group_0"
  },
  {
    "type": "schematic_text",
    "schematic_text_id": "schematic_text_0",
    "text": "LDC1614RGHR",
    "schematic_component_id": "schematic_component_0",
    "anchor": "left",
    "rotation": 0,
    "position": {
      "x": -0.6000000000000001,
      "y": -1.03
    },
    "color": "#006464",
    "font_size": 0.18
  },
  {
    "type": "schematic_text",
    "schematic_text_id": "schematic_text_1",
    "text": "U1",
    "schematic_component_id": "schematic_component_0",
    "anchor": "left",
    "rotation": 0,
    "position": {
      "x": -0.6000000000000001,
      "y": 1.03
    },
    "color": "#006464",
    "font_size": 0.18
  },
  {
    "type": "schematic_component",
    "schematic_component_id": "schematic_component_1",
    "center": {
      "x": -9,
      "y": -4
    },
    "size": {
      "width": 0.9,
      "height": 0.6
    },
    "source_component_id": "source_component_1",
    "is_box_with_pins": true,
    "symbol_name": "capacitor_down",
    "symbol_display_value": "100nF",
    "schematic_group_id": "schematic_group_0"
  },
  {
    "type": "schematic_component",
    "schematic_component_id": "schematic_component_2",
    "center": {
      "x": -6,
      "y": -4
    },
    "size": {
      "width": 0.9,
      "height": 0.6
    },
    "source_component_id": "source_component_2",
    "is_box_with_pins": true,
    "symbol_name": "capacitor_down",
    "symbol_display_value": "1uF",
    "schematic_group_id": "schematic_group_0"
  },
  {
    "type": "schematic_component",
    "schematic_component_id": "schematic_component_3",
    "center": {
      "x": -9,
      "y": 0
    },
    "size": {
      "width": 0.9,
      "height": 0.6
    },
    "source_component_id": "source_component_3",
    "is_box_with_pins": true,
    "symbol_name": "boxresistor_down",
    "symbol_display_value": "4.7kΩ",
    "schematic_group_id": "schematic_group_0"
  },
  {
    "type": "schematic_component",
    "schematic_component_id": "schematic_component_4",
    "center": {
      "x": -6,
      "y": 0
    },
    "size": {
      "width": 0.9,
      "height": 0.6
    },
    "source_component_id": "source_component_4",
    "is_box_with_pins": true,
    "symbol_name": "boxresistor_down",
    "symbol_display_value": "4.7kΩ",
    "schematic_group_id": "schematic_group_0"
  },
  {
    "type": "schematic_component",
    "schematic_component_id": "schematic_component_5",
    "center": {
      "x": -12,
      "y": -2
    },
    "rotation": 0,
    "size": {
      "width": 0.4,
      "height": 1.2000000000000002
    },
    "port_arrangement": {
      "right_side": {
        "direction": "top-to-bottom",
        "pins": [
          "pin1",
          "pin2",
          "pin3",
          "pin4",
          "pin5"
        ]
      }
    },
    "pin_spacing": 0.2,
    "port_labels": {},
    "source_component_id": "source_component_5",
    "schematic_group_id": "schematic_group_0"
  },
  {
    "type": "schematic_text",
    "schematic_text_id": "schematic_text_2",
    "text": "",
    "schematic_component_id": "schematic_component_5",
    "anchor": "left",
    "rotation": 0,
    "position": {
      "x": -12.2,
      "y": -2.73
    },
    "color": "#006464",
    "font_size": 0.18
  },
  {
    "type": "schematic_text",
    "schematic_text_id": "schematic_text_3",
    "text": "J1",
    "schematic_component_id": "schematic_component_5",
    "anchor": "left",
    "rotation": 0,
    "position": {
      "x": -12.2,
      "y": -1.27
    },
    "color": "#006464",
    "font_size": 0.18
  },
  {
    "type": "schematic_component",
    "schematic_component_id": "schematic_component_6",
    "center": {
      "x": 9,
      "y": 4
    },
    "size": {
      "width": 1.0555194999999997,
      "height": 0.4599472908242199
    },
    "source_component_id": "source_component_6",
    "is_box_with_pins": true,
    "symbol_name": "inductor_right",
    "symbol_display_value": "3µH",
    "schematic_group_id": "schematic_group_0"
  },
  {
    "type": "schematic_component",
    "schematic_component_id": "schematic_component_7",
    "center": {
      "x": 9,
      "y": 1
    },
    "size": {
      "width": 0.9,
      "height": 0.6
    },
    "source_component_id": "source_component_7",
    "is_box_with_pins": true,
    "symbol_name": "capacitor_down",
    "symbol_display_value": "1nF",
    "schematic_group_id": "schematic_group_0"
  },
  {
    "type": "schematic_component",
    "schematic_component_id": "schematic_component_8",
    "center": {
      "x": 14,
      "y": 4
    },
    "size": {
      "width": 1.0555194999999997,
      "height": 0.4599472908242199
    },
    "source_component_id": "source_component_8",
    "is_box_with_pins": true,
    "symbol_name": "inductor_right",
    "symbol_display_value": "3µH",
    "schematic_group_id": "schematic_group_0"
  },
  {
    "type": "schematic_component",
    "schematic_component_id": "schematic_component_9",
    "center": {
      "x": 14,
      "y": 1
    },
    "size": {
      "width": 0.9,
      "height": 0.6
    },
    "source_component_id": "source_component_9",
    "is_box_with_pins": true,
    "symbol_name": "capacitor_down",
    "symbol_display_value": "1nF",
    "schematic_group_id": "schematic_group_0"
  },
  {
    "type": "schematic_component",
    "schematic_component_id": "schematic_component_10",
    "center": {
      "x": 9,
      "y": -4
    },
    "size": {
      "width": 1.0555194999999997,
      "height": 0.4599472908242199
    },
    "source_component_id": "source_component_10",
    "is_box_with_pins": true,
    "symbol_name": "inductor_right",
    "symbol_display_value": "3µH",
    "schematic_group_id": "schematic_group_0"
  },
  {
    "type": "schematic_component",
    "schematic_component_id": "schematic_component_11",
    "center": {
      "x": 9,
      "y": -7
    },
    "size": {
      "width": 0.9,
      "height": 0.6
    },
    "source_component_id": "source_component_11",
    "is_box_with_pins": true,
    "symbol_name": "capacitor_down",
    "symbol_display_value": "1nF",
    "schematic_group_id": "schematic_group_0"
  },
  {
    "type": "schematic_component",
    "schematic_component_id": "schematic_component_12",
    "center": {
      "x": 14,
      "y": -4
    },
    "size": {
      "width": 1.0555194999999997,
      "height": 0.4599472908242199
    },
    "source_component_id": "source_component_12",
    "is_box_with_pins": true,
    "symbol_name": "inductor_right",
    "symbol_display_value": "3µH",
    "schematic_group_id": "schematic_group_0"
  },
  {
    "type": "schematic_component",
    "schematic_component_id": "schematic_component_13",
    "center": {
      "x": 14,
      "y": -7
    },
    "size": {
      "width": 0.9,
      "height": 0.6
    },
    "source_component_id": "source_component_13",
    "is_box_with_pins": true,
    "symbol_name": "capacitor_down",
    "symbol_display_value": "1nF",
    "schematic_group_id": "schematic_group_0"
  },
  {
    "type": "schematic_group",
    "schematic_group_id": "schematic_group_0",
    "is_subcircuit": true,
    "subcircuit_id": "subcircuit_source_group_0",
    "name": "unnamed_board1",
    "center": {
      "x": 0,
      "y": 0
    },
    "width": 0,
    "height": 0,
    "schematic_component_ids": [],
    "source_group_id": "source_group_0",
    "show_as_schematic_box": false
  },
  {
    "type": "schematic_port",
    "schematic_port_id": "schematic_port_0",
    "schematic_component_id": "schematic_component_0",
    "center": {
      "x": -1,
      "y": 0.7999999999999999
    },
    "source_port_id": "source_port_0",
    "facing_direction": "left",
    "distance_from_component_edge": 0.4,
    "side_of_component": "left",
    "pin_number": 1,
    "true_ccw_index": 0,
    "display_pin_label": "SCL",
    "is_connected": true
  },
  {
    "type": "schematic_port",
    "schematic_port_id": "schematic_port_1",
    "schematic_component_id": "schematic_component_0",
    "center": {
      "x": -1,
      "y": 0.5999999999999999
    },
    "source_port_id": "source_port_1",
    "facing_direction": "left",
    "distance_from_component_edge": 0.4,
    "side_of_component": "left",
    "pin_number": 2,
    "true_ccw_index": 1,
    "display_pin_label": "SDA",
    "is_connected": true
  },
  {
    "type": "schematic_port",
    "schematic_port_id": "schematic_port_2",
    "schematic_component_id": "schematic_component_0",
    "center": {
      "x": -1,
      "y": 0.3999999999999999
    },
    "source_port_id": "source_port_2",
    "facing_direction": "left",
    "distance_from_component_edge": 0.4,
    "side_of_component": "left",
    "pin_number": 3,
    "true_ccw_index": 2,
    "display_pin_label": "CLKIN",
    "is_connected": true
  },
  {
    "type": "schematic_port",
    "schematic_port_id": "schematic_port_3",
    "schematic_component_id": "schematic_component_0",
    "center": {
      "x": -1,
      "y": 0.19999999999999984
    },
    "source_port_id": "source_port_3",
    "facing_direction": "left",
    "distance_from_component_edge": 0.4,
    "side_of_component": "left",
    "pin_number": 4,
    "true_ccw_index": 3,
    "display_pin_label": "ADDR",
    "is_connected": true
  },
  {
    "type": "schematic_port",
    "schematic_port_id": "schematic_port_4",
    "schematic_component_id": "schematic_component_0",
    "center": {
      "x": -1,
      "y": -1.1102230246251565e-16
    },
    "source_port_id": "source_port_4",
    "facing_direction": "left",
    "distance_from_component_edge": 0.4,
    "side_of_component": "left",
    "pin_number": 5,
    "true_ccw_index": 4,
    "display_pin_label": "INTB",
    "is_connected": true
  },
  {
    "type": "schematic_port",
    "schematic_port_id": "schematic_port_5",
    "schematic_component_id": "schematic_component_0",
    "center": {
      "x": -1,
      "y": -0.20000000000000007
    },
    "source_port_id": "source_port_5",
    "facing_direction": "left",
    "distance_from_component_edge": 0.4,
    "side_of_component": "left",
    "pin_number": 6,
    "true_ccw_index": 5,
    "display_pin_label": "SD",
    "is_connected": true
  },
  {
    "type": "schematic_port",
    "schematic_port_id": "schematic_port_6",
    "schematic_component_id": "schematic_component_0",
    "center": {
      "x": -1,
      "y": -0.4
    },
    "source_port_id": "source_port_6",
    "facing_direction": "left",
    "distance_from_component_edge": 0.4,
    "side_of_component": "left",
    "pin_number": 7,
    "true_ccw_index": 6,
    "display_pin_label": "VDD",
    "is_connected": true
  },
  {
    "type": "schematic_port",
    "schematic_port_id": "schematic_port_7",
    "schematic_component_id": "schematic_component_0",
    "center": {
      "x": -1,
      "y": -0.6
    },
    "source_port_id": "source_port_7",
    "facing_direction": "left",
    "distance_from_component_edge": 0.4,
    "side_of_component": "left",
    "pin_number": 8,
    "true_ccw_index": 7,
    "display_pin_label": "GND",
    "is_connected": true
  },
  {
    "type": "schematic_port",
    "schematic_port_id": "schematic_port_8",
    "schematic_component_id": "schematic_component_0",
    "center": {
      "x": -1,
      "y": -0.7999999999999999
    },
    "source_port_id": "source_port_8",
    "facing_direction": "left",
    "distance_from_component_edge": 0.4,
    "side_of_component": "left",
    "pin_number": 9,
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    "y": -9.981905864934205,
    "hole_diameter": 0.3,
    "outer_diameter": 0.6,
    "layers": [
      "top",
      "bottom"
    ],
    "from_layer": "top",
    "to_layer": "bottom",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
  },
  {
    "type": "pcb_via",
    "pcb_via_id": "pcb_via_43",
    "pcb_trace_id": "source_trace_0__source_trace_2_mst0_0",
    "x": 7.48947034709864,
    "y": -9.689324227487514,
    "hole_diameter": 0.3,
    "outer_diameter": 0.6,
    "layers": [
      "top",
      "bottom"
    ],
    "from_layer": "bottom",
    "to_layer": "top",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
  },
  {
    "type": "pcb_via",
    "pcb_via_id": "pcb_via_44",
    "pcb_trace_id": "source_trace_0__source_trace_2_mst1_0",
    "x": 9.65,
    "y": -24.565,
    "hole_diameter": 0.3,
    "outer_diameter": 0.6,
    "layers": [
      "top",
      "bottom"
    ],
    "from_layer": "bottom",
    "to_layer": "top",
    "subcircuit_id": "subcircuit_source_group_0",
    "subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
  },
  {
    "type": "pcb_pad_pad_clearance_error",
    "pcb_pad_pad_clearance_error_id": "pcb_pad_pad_clearance_error_0",
    "error_type": "pcb_pad_pad_clearance_error",
    "message": "Via pcb_via[#pcb_via_0] and pad pcb_port[.U1 > .GND] are too close (clearance: 0mm, minimum: 0.1mm)",
    "pcb_pad_ids": [
      "pcb_via_0",
      "pcb_smtpad_9"
    ],
    "minimum_clearance": 0.1,
    "actual_clearance": 0.0000013000000000928935,
    "center": {
      "x": -0.6348087671605677,
      "y": -2.24003935
    }
  },
  {
    "type": "source_component_pins_underspecified_warning",
    "source_component_pins_underspecified_warning_id": "source_component_pins_underspecified_warning_0",
    "warning_type": "source_component_pins_underspecified_warning",
    "message": "All pins on U1 are underspecified (no pinAttributes set)",
    "source_component_id": "source_component_0",
    "source_port_ids": [
      "source_port_0",
      "source_port_1",
      "source_port_2",
      "source_port_3",
      "source_port_4",
      "source_port_5",
      "source_port_6",
      "source_port_7",
      "source_port_8",
      "source_port_9",
      "source_port_10",
      "source_port_11",
      "source_port_12",
      "source_port_13",
      "source_port_14",
      "source_port_15",
      "source_port_16"
    ],
    "subcircuit_id": "subcircuit_source_group_0"
  },
  {
    "type": "source_no_power_pin_defined_warning",
    "source_no_power_pin_defined_warning_id": "source_no_power_pin_defined_warning_0",
    "warning_type": "source_no_power_pin_defined_warning",
    "message": "U1 has no pin with requires_power=true",
    "source_component_id": "source_component_0",
    "source_port_ids": [
      "source_port_0",
      "source_port_1",
      "source_port_2",
      "source_port_3",
      "source_port_4",
      "source_port_5",
      "source_port_6",
      "source_port_7",
      "source_port_8",
      "source_port_9",
      "source_port_10",
      "source_port_11",
      "source_port_12",
      "source_port_13",
      "source_port_14",
      "source_port_15",
      "source_port_16"
    ],
    "subcircuit_id": "subcircuit_source_group_0"
  },
  {
    "type": "source_no_ground_pin_defined_warning",
    "source_no_ground_pin_defined_warning_id": "source_no_ground_pin_defined_warning_0",
    "warning_type": "source_no_ground_pin_defined_warning",
    "message": "U1 has no pin with requires_ground=true",
    "source_component_id": "source_component_0",
    "source_port_ids": [
      "source_port_0",
      "source_port_1",
      "source_port_2",
      "source_port_3",
      "source_port_4",
      "source_port_5",
      "source_port_6",
      "source_port_7",
      "source_port_8",
      "source_port_9",
      "source_port_10",
      "source_port_11",
      "source_port_12",
      "source_port_13",
      "source_port_14",
      "source_port_15",
      "source_port_16"
    ],
    "subcircuit_id": "subcircuit_source_group_0"
  },
  {
    "type": "source_project_metadata",
    "source_filesystem_md5_hash": "5c94bca51640deb69829befa4b745427"
  }
]