hrithik18k/metal-touch-panel

A PCB autorouting wrapper that corrects footprint-trace obstacle dimensions, solves routes with a preloaded trace-graph solver, and reports completed traces or routing errors.

Version
1.0.0
License
unset
Stars
0

evidence/17-corrected-build.log

Building 1 file(s)...
Building index.circuit.tsx...
Generating circuit JSON...
trace: `key` is not a prop. Trying to access it will result in `undefined` being returned. If you need to access the same value within the child component, you should pass it as a different prop. (https://react.dev/link/special-props)
Wrote debug artifact: dist\autorouter-debug\placement-unrouted.png
Autorouting <board#189 /> phase 1/1 start: connections=23, obstacles=250, previous_traces=0, router=custom, cache=disabled(custom_algorithm)
  connections: U1.IN0A to L1.pin1, U1.IN0B to L1.pin2, C1.pin1 to L1.pin1, C1.pin2 to L1.pin2, U1.IN1A to L2.pin1, U1.IN1B to L2.pin2, C2.pin1 to L2.pin1, C2.pin2 to L2.pin2, U1.IN2A to L3.pin1, U1.IN2B to L3.pin2, C3.pin1 to L3.pin1, C3.pin2 to L3.pin2, U1.IN3A to L4.pin1, U1.IN3B to L4.pin2, C4.pin1 to L4.pin1, C4.pin2 to L4.pin2, U1.SCL to J1.pin4, U1.SDA to J1.pin3, R1.pin2 to U1.SCL, R2.pin2 to U1.SDA, U1.INTB to J1.pin5, net.GND, net.V3V3
Wrote debug artifact: dist\autorouter-debug\phase-0.input.simple-route.json
  phase 1/1 done: routed_traces=33, jumpers=0, errors=0, elapsed=4.2s
Wrote debug artifact: dist\autorouter-debug\phase-0.output.traces.json
Wrote debug artifact: dist\autorouter-debug\phase-0-routed.png
Wrote debug artifact: dist\autorouter-debug\board.meta.json
Circuit JSON written to dist\index\circuit.json
<trace#99(from:U1.IN0A to:L1.pin1) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#100(from:U1.IN0B to:L1.pin2) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#101(from:C1.pin1 to:L1.pin1) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#102(from:C1.pin2 to:L1.pin2) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#119(from:U1.IN1A to:L2.pin1) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#120(from:U1.IN1B to:L2.pin2) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#121(from:C2.pin1 to:L2.pin1) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#122(from:C2.pin2 to:L2.pin2) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#139(from:U1.IN2A to:L3.pin1) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#140(from:U1.IN2B to:L3.pin2) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#141(from:C3.pin1 to:L3.pin1) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#142(from:C3.pin2 to:L3.pin2) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#159(from:U1.IN3A to:L4.pin1) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#160(from:U1.IN3B to:L4.pin2) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#161(from:C4.pin1 to:L4.pin1) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#162(from:C4.pin2 to:L4.pin2) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#178(from:U1.SCL to:J1.pin4) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#179(from:U1.SDA to:J1.pin3) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#180(from:R1.pin2 to:U1.SCL) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#181(from:R2.pin2 to:U1.SDA) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#182(from:U1.INTB to:J1.pin5) /> is missing a name. Add a name prop to make the trace easier to identify.
No <schematicsheet> was found. Add a <schematicsheet> to define the schematic drawing area.
L1 has no courtyard
L2 has no courtyard
L3 has no courtyard
L4 has no courtyard
All pins on U1 are underspecified (no pinAttributes set)
U1 has no pin with requires_power=true
U1 has no pin with requires_ground=true
Generating preview images...
[index] Generating PCB PNG...
[index] Written pcb.png

Build complete
  Circuits  1 passed
  Options   pcb-png, autorouter-debug, autorouter-dump-srj
  Output    dist

✓ Done
Build exiting with code 0: build finished successfully