gokul/cm4-media-carrier

validation/final-cli-build.log

Building 1 file(s)...
Building index.tsx...
Generating circuit JSON...
Saved autorouting paths to .tscircuit/autorouting-artifacts/index-tsx-b211563a37/subcircuit_source_group_27-phase-0-order-0-stage-0.pcb-trace-paths.json (import this JSON into <autoroutingphase pcbTracePaths={...} />).
Routing low-speed wiring with tscircuit on outer layers 4
Autorouting phase 2/2 "POWER_AND_CONTROL" has been running for 10.7s; enabling phase diagnostics. Re-run with --autorouter-debug for full autorouter logs from the start.
Autorouting <board#560 /> phase 2/2 "POWER_AND_CONTROL" long-running start: connections=16, obstacles=784, previous_traces=1, router=custom, cache=disabled(custom_algorithm)
  connections: J_USB.CC1 to R_CC1.pin1, J_USB.CC2 to R_CC2.pin1, R_PWR.pin2 to D_PWR.anode, R_ACT.pin2 to D_ACT.anode, J_RESET.RESET to R_RESET.pin1, , net.V3, net.HDMI_5V, net.ACT, net.RUN, net.BOOT, net.CEC, net.HPD, net.DDC_SDA, net.DDC_SCL
  phase 2/2 "POWER_AND_CONTROL" progress: steps=250 progress=60% elapsed=10.7s
  phase 2/2 "POWER_AND_CONTROL" progress: steps=251 progress=64% elapsed=10.9s
  phase 2/2 "POWER_AND_CONTROL" progress: steps=397 progress=96% elapsed=20.9s
  phase 2/2 "POWER_AND_CONTROL" done: routed_traces=110, jumpers=0, errors=0, elapsed=29.6s
Could not save autorouting paths for subcircuit_source_group_27: PCB port selector is not unique: .undefined port.top
Circuit JSON written to dist/index/circuit.json
<trace#1848(from:.J_USB > .CC1 to:.R_CC1 > .pin1) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#1849(from:.J_USB > .CC2 to:.R_CC2 > .pin1) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#1878(from:.R_PWR > .pin2 to:.D_PWR > .anode) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#1881(from:.R_ACT > .pin2 to:.D_ACT > .anode) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#1885(from:.J_RESET > .pin1 to:.R_RESET > .pin1) /> is missing a name. Add a name prop to make the trace easier to identify.
No <schematicsheet> was found. Add a <schematicsheet> to define the schematic drawing area.
Generating preview images for all builds...
[index] Generating PCB SVG...
[index] Written pcb.svg
[index] Generating schematic SVG...
[index] Written schematic.svg
[index] Generating 3D PNG...
[index] Written 3d.png

Build complete
  Circuits  1 passed
  Options   all-images, autorouter-timeout
  Output    dist

✓ Done
Build exiting with code 0: build finished successfully