0hmX/am3352-ddr-track-a-local-dfm-wip-20261007
Experimental RJ45-corrected board with isolated PG indication. 1005/1005 source joins pass; 15 expanded-guard physical errors, sourcing and qualification gates remain. Not fabrication-ready.
- Version
- 0.0.14
- License
- unset
- Stars
- 0
layout/ControlRoutes.tsx
// Numeric paths use the exact U1 footprint_origin at (0, 0); each path anchors to its own CPU terminal.
export function ControlRoutes(){return <>
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<trace name="CPU_CONTROL_1" from=".U1 > .V10" pcbPathRelativeTo=".U1 > .V10" to=".Y_SOC > .3" width={0.1} pcbStyle={{viaHoleDiameter:0.15,viaPadDiameter:0.3}} pcbPath={[".U1 > .V10",{"x":6.800000000000001,"y":0.4,"layer":"top"},{"x":8.05,"y":0.4,"layer":"top"},{"x":8.05,"y":-1.12,"layer":"top"},{"x":8.01,"y":-1.12,"layer":"top"},{"x":8.049999999999999,"y":-9.075,"layer":"top"},".Y_SOC > .3"]} />
<trace name="CPU_CONTROL_2" from=".U1 > .B11" pcbPathRelativeTo=".U1 > .B11" to=".R_TDI > .pin1" width={0.1} pcbStyle={{viaHoleDiameter:0.15,viaPadDiameter:0.3}} pcbPath={[".U1 > .B11",{"x":-6,"y":1.2000000000000002,"via":true,"fromLayer":"top","toLayer":"inner4"},{"x":-6,"y":1.2000000000000002,"layer":"inner4"},{"x":-6,"y":11.5,"layer":"inner4"},{"x":-15.51,"y":11.5,"layer":"inner4"},{"x":-15.51,"y":11.5,"via":true,"fromLayer":"inner4","toLayer":"top"},".R_TDI > .pin1"]} />
<trace name="CPU_CONTROL_3" from=".U1 > .C11" pcbPathRelativeTo=".U1 > .C11" to=".R_TMS > .pin1" width={0.1} pcbStyle={{viaHoleDiameter:0.15,viaPadDiameter:0.3}} pcbPath={[".U1 > .C11",{"x":-5.2,"y":1.2000000000000002,"via":true,"fromLayer":"top","toLayer":"inner2"},{"x":-5.2,"y":1.2000000000000002,"layer":"inner2"},{"x":-5.69,"y":1.2,"layer":"inner2"},{"x":-5.69,"y":0.533,"layer":"inner2"},{"x":6.3275,"y":0.533,"layer":"inner2"},{"x":6.3275,"y":0.337,"layer":"inner2"},{"x":-5.69,"y":0.337,"layer":"inner2"},{"x":-5.69,"y":0.09,"layer":"inner2"},{"x":-16.01,"y":0.09,"layer":"inner2"},{"x":-16.01,"y":13,"layer":"inner2"},{"x":-16.01,"y":13,"via":true,"fromLayer":"inner2","toLayer":"top"},".R_TMS > .pin1"]} />
<trace name="CPU_CONTROL_4" from=".U1 > .B14" pcbPathRelativeTo=".U1 > .B14" to=".R_EMU1 > .pin1" width={0.1} pcbStyle={{viaHoleDiameter:0.15,viaPadDiameter:0.3}} pcbPath={[".U1 > .B14",{"x":-6,"y":3.6,"layer":"top"},{"x":-6,"y":4.04,"layer":"top"},{"x":-11.51,"y":4.04,"layer":"top"},{"x":-11.51,"y":9.5,"layer":"top"},".R_EMU1 > .pin1"]} />
<trace name="CPU_CONTROL_5" from=".U1 > .C14" pcbPathRelativeTo=".U1 > .C14" to=".R_EMU0 > .pin1" width={0.1} pcbStyle={{viaHoleDiameter:0.15,viaPadDiameter:0.3}} pcbPath={[".U1 > .C14",{"x":-5.2,"y":3.6,"via":true,"fromLayer":"top","toLayer":"inner2"},{"x":-5.2,"y":3.6,"layer":"inner2"},{"x":-5.2,"y":4.89,"layer":"inner2"},{"x":-5.51,"y":4.89,"layer":"inner2"},{"x":-5.51,"y":14.5,"layer":"inner2"},{"x":-12.29,"y":14.5,"layer":"inner2"},{"x":-12.29,"y":14.81,"layer":"inner2"},{"x":-15.51,"y":14.81,"layer":"inner2"},{"x":-15.51,"y":14.5,"layer":"inner2"},{"x":-15.51,"y":14.5,"via":true,"fromLayer":"inner2","toLayer":"top"},".R_EMU0 > .pin1"]} />
<trace name="CPU_CONTROL_6" from=".U1 > .E15" pcbPathRelativeTo=".U1 > .E15" to=".TP_UART_3 > .1" width={0.1} pcbStyle={{viaHoleDiameter:0.15,viaPadDiameter:0.3}} pcbPath={[".U1 > .E15",{"x":-3.6,"y":4.4,"via":true,"fromLayer":"top","toLayer":"inner2"},{"x":-3.6,"y":4.4,"layer":"inner2"},{"x":-2.31,"y":4.4,"layer":"inner2"},{"x":-2.31,"y":4.71,"layer":"inner2"},{"x":1,"y":4.71,"layer":"inner2"},{"x":1,"y":14,"layer":"inner2"},{"x":1,"y":14,"via":true,"fromLayer":"inner2","toLayer":"top"},".TP_UART_3 > .1"]} />
<trace name="CPU_CONTROL_7" from=".U1 > .E16" pcbPathRelativeTo=".U1 > .E16" to=".TP_UART_2 > .1" width={0.1} pcbStyle={{viaHoleDiameter:0.15,viaPadDiameter:0.3}} pcbPath={[".U1 > .E16",{"x":-3.6,"y":5.2,"via":true,"fromLayer":"top","toLayer":"inner2"},{"x":-3.6,"y":5.2,"layer":"inner2"},{"x":-3.6,"y":14,"layer":"inner2"},{"x":-1,"y":14,"layer":"inner2"},{"x":-1,"y":14,"via":true,"fromLayer":"inner2","toLayer":"top"},".TP_UART_2 > .1"]} />
<trace name="CPU_CONTROL_8" from=".U1 > .G17" pcbPathRelativeTo=".U1 > .G17" to=".R_SD_CLK > .pin1" width={0.1} pcbStyle={{viaHoleDiameter:0.15,viaPadDiameter:0.3}} pcbPath={[".U1 > .G17",{"x":-2,"y":6,"via":true,"fromLayer":"top","toLayer":"inner2"},{"x":-2,"y":6,"layer":"inner2"},{"x":-2.49,"y":6,"layer":"inner2"},{"x":-2.49,"y":8.99,"layer":"inner2"},{"x":-2.75,"y":8.99,"layer":"inner2"},{"x":-2.75,"y":8.99,"via":true,"fromLayer":"inner2","toLayer":"top"},".R_SD_CLK > .pin1"]} />
<trace name="CPU_CONTROL_9" from=".U1 > .C6" pcbPathRelativeTo=".U1 > .C6" to=".U_PMIC > .46" width={0.1} pcbStyle={{viaHoleDiameter:0.15,viaPadDiameter:0.3}} pcbPath={[".U1 > .C6",{"x":-5.2,"y":-2.8000000000000003,"via":true,"fromLayer":"top","toLayer":"inner2"},{"x":-5.2,"y":-2.8000000000000003,"layer":"inner2"},{"x":19.6,"y":-2.8,"layer":"inner2"},{"x":19.6,"y":0.9375,"layer":"inner2"},{"x":19.6,"y":0.9375,"via":true,"fromLayer":"inner2","toLayer":"top"},".U_PMIC > .46"]} />
<trace name="CPU_CONTROL_10" from=".U1 > .C6" pcbPathRelativeTo=".U1 > .C6" to=".R_PMIC_EN > .pin1" width={0.1} pcbStyle={{viaHoleDiameter:0.15,viaPadDiameter:0.3}} pcbPath={[".U1 > .C6",{"x":-5.2,"y":-2.8000000000000003,"via":true,"fromLayer":"top","toLayer":"inner2"},{"x":-5.2,"y":-2.8000000000000003,"layer":"inner2"},{"x":26.89,"y":-2.8,"layer":"inner2"},{"x":26.889999999999997,"y":-17.5,"layer":"inner2"},{"x":26.889999999999997,"y":-17.5,"via":true,"fromLayer":"inner2","toLayer":"top"},".R_PMIC_EN > .pin1"]} />
<trace name="CPU_CONTROL_11" from=".U1 > .V8" pcbPathRelativeTo=".U1 > .V8" to=".U_PMIC > .45" width={0.1} pcbStyle={{viaHoleDiameter:0.15,viaPadDiameter:0.3}} pcbPath={[".U1 > .V8",{"x":6.800000000000001,"y":-1.2000000000000002,"via":true,"fromLayer":"top","toLayer":"inner2"},{"x":6.800000000000001,"y":-1.2000000000000002,"layer":"inner2"},{"x":6.8,"y":0.09,"layer":"inner2"},{"x":7.11,"y":0.09,"layer":"inner2"},{"x":7.11,"y":0.9375,"layer":"inner2"},{"x":19.29,"y":0.9375,"layer":"inner2"},{"x":19.29,"y":1.2475,"layer":"inner2"},{"x":20,"y":1.2475,"layer":"inner2"},{"x":20,"y":0.9375,"layer":"inner2"},{"x":20,"y":0.9375,"via":true,"fromLayer":"inner2","toLayer":"top"},".U_PMIC > .45"]} />
<trace name="CPU_CONTROL_12" from=".U1 > .V8" pcbPathRelativeTo=".U1 > .V8" to=".R_PWR4 > .pin1" width={0.1} pcbStyle={{viaHoleDiameter:0.15,viaPadDiameter:0.3}} pcbPath={[".U1 > .V8",{"x":6.800000000000001,"y":-1.2000000000000002,"via":true,"fromLayer":"top","toLayer":"inner4"},{"x":6.800000000000001,"y":-1.2000000000000002,"layer":"inner4"},{"x":6.8,"y":-12.5,"layer":"inner4"},{"x":15.99,"y":-12.5,"layer":"inner4"},{"x":15.99,"y":-12.5,"via":true,"fromLayer":"inner4","toLayer":"top"},".R_PWR4 > .pin1"]} />
<trace name="CPU_CONTROL_13" from=".U1 > .U16" pcbPathRelativeTo=".U1 > .U16" to=".J_MICROSD > .9" width={0.1} pcbStyle={{viaHoleDiameter:0.15,viaPadDiameter:0.3}} pcbPath={[".U1 > .U16",{"x":6,"y":5.2,"layer":"top"},{"x":5.56,"y":5.2,"layer":"top"},{"x":5.56,"y":5.56,"layer":"top"},{"x":9.81,"y":5.56,"layer":"top"},{"x":9.81,"y":5.52,"layer":"top"},{"x":9.03,"y":5.52,"layer":"top"},{"x":9.03,"y":4.84,"layer":"top"},{"x":8.315,"y":4.84,"layer":"top"},{"x":8.315,"y":4.425636,"layer":"top"},{"x":8.185,"y":4.425636,"layer":"top"},{"x":8.185,"y":4.5475,"layer":"top"},{"x":7.16,"y":4.5475,"layer":"top"},{"x":7.16,"y":4.04,"layer":"top"},{"x":7.21,"y":4.04,"layer":"top"},{"x":7.21,"y":2.4525,"layer":"top"},{"x":7.16,"y":2.4525,"layer":"top"},{"x":7.16,"y":3.16,"layer":"top"},{"x":-11.675,"y":3.16,"layer":"top"},{"x":-11.674999999999997,"y":-7.625000000000002,"layer":"top"},".J_MICROSD > .9"]} />
<trace name="CPU_CONTROL_14" from=".U1 > .U16" pcbPathRelativeTo=".U1 > .U16" to=".R_SD_CD > .pin2" width={0.1} pcbStyle={{viaHoleDiameter:0.15,viaPadDiameter:0.3}} pcbPath={[".U1 > .U16",{"x":6,"y":5.2,"via":true,"fromLayer":"top","toLayer":"inner4"},{"x":6,"y":5.2,"layer":"inner4"},{"x":-1.69,"y":5.2,"layer":"inner4"},{"x":-1.69,"y":5.51,"layer":"inner4"},{"x":-5.79,"y":5.51,"layer":"inner4"},{"x":-5.79,"y":1.51,"layer":"inner4"},{"x":-5.69,"y":1.51,"layer":"inner4"},{"x":-5.69,"y":-2,"layer":"inner4"},{"x":-9.49,"y":-2,"layer":"inner4"},{"x":-9.49,"y":-2,"via":true,"fromLayer":"inner4","toLayer":"top"},".R_SD_CD > .pin2"]} />
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