0hmX/am3352-ddr-track-a-local-dfm-wip-20261007

hdmi/validation-next/power-widening/source-ddr-reference-proof.json

{
  "status": "SOURCE_POSES_DDR_TX_AND_ALL_GROUND_REFERENCES_PRESERVED",
  "baseline_sha256": "3b110f427c6b17cb47b397f8b84f3794db91c67c8e73506d315e96bfe143f0da",
  "candidate_sha256": "d5e8f9ace911e5989cb3b5224afe20091092f4b42c3344a8d1749f056230c98b",
  "all_source_records_unchanged": true,
  "all_native_component_pad_port_CAD_records_unchanged": true,
  "unchanged_named_ddr_trace_via_records": 320,
  "unchanged_ddr_ids": [
    "baseline_preserved_signal_source_trace_14",
    "baseline_preserved_signal_source_trace_29",
    "baseline_preserved_signal_source_trace_15",
    "baseline_preserved_signal_source_trace_16",
    "baseline_preserved_signal_source_trace_30",
    "baseline_preserved_signal_source_trace_3",
    "baseline_preserved_signal_source_trace_40",
    "baseline_preserved_signal_source_trace_8",
    "baseline_preserved_signal_source_trace_20",
    "baseline_preserved_signal_source_trace_24",
    "baseline_preserved_signal_source_trace_21",
    "baseline_preserved_signal_source_trace_4",
    "baseline_preserved_signal_source_trace_17",
    "baseline_preserved_signal_source_trace_31",
    "baseline_preserved_signal_source_trace_41",
    "baseline_preserved_signal_source_trace_43",
    "baseline_preserved_signal_source_trace_36",
    "baseline_preserved_signal_source_trace_11",
    "baseline_preserved_signal_source_trace_26",
    "baseline_preserved_signal_source_trace_38",
    "baseline_preserved_signal_source_trace_1",
    "baseline_preserved_signal_source_trace_27",
    "baseline_preserved_signal_source_trace_28",
    "baseline_preserved_signal_source_trace_39",
    "baseline_preserved_signal_source_trace_12",
    "baseline_preserved_signal_source_trace_13",
    "baseline_preserved_signal_source_trace_25",
    "baseline_preserved_signal_source_trace_2",
    "baseline_preserved_signal_source_trace_6",
    "baseline_preserved_signal_source_trace_7",
    "baseline_preserved_signal_source_trace_44",
    "baseline_preserved_signal_source_trace_45",
    "baseline_preserved_signal_source_trace_42",
    "baseline_preserved_signal_source_trace_46",
    "baseline_preserved_signal_source_trace_23",
    "baseline_preserved_signal_source_trace_22",
    "baseline_preserved_signal_source_trace_34",
    "baseline_preserved_signal_source_trace_35",
    "baseline_preserved_signal_source_trace_10",
    "baseline_preserved_signal_source_trace_37",
    "baseline_preserved_signal_source_trace_18",
    "baseline_preserved_signal_source_trace_9",
    "baseline_preserved_signal_source_trace_0",
    "baseline_preserved_signal_source_trace_19",
    "baseline_preserved_signal_source_trace_33",
    "baseline_preserved_signal_source_trace_5",
    "baseline_preserved_signal_source_trace_32",
    "baseline_ram_decap_C_RAM_0_1",
    "baseline_ram_decap_C_RAM_1_1",
    "baseline_ram_decap_C_RAM_2_1",
    "baseline_ram_decap_C_RAM_3_1",
    "baseline_ram_decap_C_RAM_4_1",
    "baseline_ram_decap_C_RAM_5_1",
    "baseline_ram_decap_C_RAM_6_1",
    "baseline_ram_decap_C_RAM_7_1",
    "baseline_ram_decap_C_RAM_8_1",
    "baseline_ram_decap_C_RAM_9_1",
    "baseline_ram_decap_C_RAM_10_1",
    "baseline_ram_decap_C_RAM_11_1",
    "baseline_support_escape_U3_F1",
    "baseline_support_escape_U3_K8",
    "baseline_support_escape_U3_D9",
    "baseline_support_escape_U1_J3",
    "baseline_support_escape_U1_J4",
    "baseline_support_escape_U3_H1",
    "baseline_support_escape_U3_L8",
    "baseline_support_escape_U3_M8",
    "baseline_support_escape_U1_E5",
    "baseline_support_escape_U1_F5",
    "baseline_support_escape_U1_G5",
    "baseline_support_escape_U1_H5",
    "baseline_support_escape_U1_J5",
    "baseline_support_escape_U1_K5",
    "baseline_support_escape_U1_L5",
    "baseline_support_escape_U3_A1",
    "baseline_support_escape_U3_C1",
    "baseline_support_escape_U3_N1",
    "baseline_support_escape_U3_R1",
    "baseline_support_escape_U3_B2",
    "baseline_support_escape_U3_D2",
    "baseline_support_escape_U3_H2",
    "baseline_support_escape_U3_K2",
    "baseline_support_escape_U3_G7",
    "baseline_support_escape_U3_A8",
    "baseline_support_escape_U3_E9",
    "baseline_support_escape_U3_H9",
    "baseline_support_escape_U3_N9",
    "baseline_support_escape_U3_R9",
    "baseline_reset_ijump_a3c6bd23_13",
    "baseline_plane_tie_DDR_1V5_0dee7f1d_0",
    "baseline_plane_tie_DDR_1V5_0dee7f1d_2",
    "baseline_plane_tie_DDR_1V5_0dee7f1d_4",
    "baseline_plane_tie_DDR_1V5_0dee7f1d_6",
    "baseline_plane_tie_DDR_1V5_0dee7f1d_8",
    "baseline_ddr_cap_4c88c897_pcb_port_699",
    "baseline_ddr_cap_4c88c897_pcb_port_701",
    "baseline_ddr_cap_4c88c897_pcb_port_703",
    "baseline_ddr_cap_4c88c897_pcb_port_917",
    "baseline_ddr_cap_4c88c897_pcb_port_921",
    "baseline_ddr_cap_4c88c897_pcb_port_925",
    "baseline_ddr_cap_4c88c897_pcb_port_927",
    "baseline_ddr_cap_4c88c897_pcb_port_929",
    "baseline_ddr_cap_4c88c897_pcb_port_931",
    "baseline_ddr_cap_4c88c897_pcb_port_705",
    "baseline_ddr_cap_4c88c897_pcb_port_913",
    "baseline_ddr_cap_4c88c897_pcb_port_915",
    "baseline_ddr_cap_d36217b1_pcb_port_923",
    "baseline_ddr_cap_d36217b1_pcb_port_707",
    "baseline_ddr_cap_d36217b1_pcb_port_905",
    "baseline_ddr_cap_d36217b1_pcb_port_907",
    "baseline_ddr_cap_d36217b1_pcb_port_911",
    "baseline_ddr_cap_711ac343_pcb_port_909",
    "baseline_ddr_cap_222cd283_pcb_port_919",
    "baseline_reset_ijump_ee87e890_0",
    "baseline_reset_ijump_ee87e890_2",
    "baseline_reset_ijump_ee87e890_3",
    "baseline_reset_ijump_ee87e890_4",
    "baseline_reset_ijump_ee87e890_6",
    "baseline_reset_ijump_d886ba68_2",
    "baseline_reset_ijump_d886ba68_4",
    "baseline_vtp_l3_2f2819c3",
    "baseline_vref_l3_5690d202_support_via_U3_H1",
    "baseline_vref_l3_c4c96cfa_support_via_U3_M8",
    "baseline_ddr_cap_4c88c897_pcb_port_933",
    "baseline_processor_feed_0b682182_0_load_DDR_1V5",
    "baseline_processor_feed_0b682182_1_load_DDR_1V5",
    "baseline_processor_feed_0b682182_2_load_DDR_1V5",
    "baseline_north_feedback_17787539_DDR_1V5",
    "baseline_bulk_branch_f8da9606_C_PWR9",
    "baseline_bulk_branch_f8da9606_C_PWR9_B",
    "baseline_closure_bf77cf69_R_VREF_TOP_pin1_existing",
    "baseline_closure_bf77cf69_R_DDR_RESET_pin2_tap0",
    "baseline_reset_ijump_f9f37ff3_0",
    "baseline_closure_98afff44_U3_C9_actual_supply",
    "baseline_pcb_via_4",
    "baseline_pcb_via_5",
    "baseline_preserved_pcb_via_0",
    "baseline_preserved_pcb_via_1",
    "baseline_preserved_pcb_via_2",
    "baseline_preserved_pcb_via_3",
    "baseline_preserved_pcb_via_4",
    "baseline_preserved_pcb_via_5",
    "baseline_preserved_pcb_via_6",
    "baseline_preserved_pcb_via_7",
    "baseline_preserved_pcb_via_8",
    "baseline_preserved_pcb_via_9",
    "baseline_preserved_pcb_via_10",
    "baseline_preserved_pcb_via_11",
    "baseline_preserved_pcb_via_12",
    "baseline_preserved_pcb_via_13",
    "baseline_preserved_pcb_via_14",
    "baseline_preserved_pcb_via_15",
    "baseline_preserved_pcb_via_16",
    "baseline_preserved_pcb_via_17",
    "baseline_preserved_pcb_via_18",
    "baseline_preserved_pcb_via_19",
    "baseline_preserved_pcb_via_20",
    "baseline_preserved_pcb_via_21",
    "baseline_preserved_pcb_via_22",
    "baseline_preserved_pcb_via_23",
    "baseline_preserved_pcb_via_24",
    "baseline_preserved_pcb_via_25",
    "baseline_preserved_pcb_via_26",
    "baseline_preserved_pcb_via_27",
    "baseline_preserved_pcb_via_28",
    "baseline_preserved_pcb_via_29",
    "baseline_preserved_pcb_via_30",
    "baseline_preserved_pcb_via_31",
    "baseline_preserved_pcb_via_32",
    "baseline_preserved_pcb_via_33",
    "baseline_preserved_pcb_via_34",
    "baseline_preserved_pcb_via_35",
    "baseline_preserved_pcb_via_36",
    "baseline_preserved_pcb_via_37",
    "baseline_preserved_pcb_via_38",
    "baseline_preserved_pcb_via_39",
    "baseline_preserved_pcb_via_40",
    "baseline_preserved_pcb_via_41",
    "baseline_preserved_pcb_via_42",
    "baseline_preserved_pcb_via_43",
    "baseline_preserved_pcb_via_44",
    "baseline_preserved_pcb_via_45",
    "baseline_preserved_pcb_via_46",
    "baseline_preserved_pcb_via_47",
    "baseline_preserved_pcb_via_48",
    "baseline_preserved_pcb_via_49",
    "baseline_preserved_pcb_via_50",
    "baseline_preserved_pcb_via_51",
    "baseline_preserved_pcb_via_52",
    "baseline_preserved_pcb_via_53",
    "baseline_preserved_pcb_via_54",
    "baseline_preserved_pcb_via_55",
    "baseline_preserved_pcb_via_56",
    "baseline_preserved_pcb_via_57",
    "baseline_preserved_pcb_via_58",
    "baseline_preserved_pcb_via_59",
    "baseline_preserved_pcb_via_60",
    "baseline_preserved_pcb_via_61",
    "baseline_preserved_pcb_via_62",
    "baseline_preserved_pcb_via_63",
    "baseline_preserved_pcb_via_64",
    "baseline_preserved_pcb_via_65",
    "baseline_preserved_pcb_via_66",
    "baseline_preserved_pcb_via_67",
    "baseline_preserved_pcb_via_68",
    "baseline_preserved_pcb_via_69",
    "baseline_preserved_pcb_via_70",
    "baseline_preserved_pcb_via_71",
    "baseline_preserved_pcb_via_72",
    "baseline_preserved_pcb_via_73",
    "baseline_preserved_pcb_via_74",
    "baseline_preserved_pcb_via_75",
    "baseline_preserved_pcb_via_76",
    "baseline_preserved_pcb_via_77",
    "baseline_preserved_pcb_via_78",
    "baseline_preserved_pcb_via_79",
    "baseline_preserved_pcb_via_80",
    "baseline_preserved_pcb_via_81",
    "baseline_preserved_pcb_via_82",
    "baseline_preserved_pcb_via_83",
    "baseline_preserved_pcb_via_84",
    "baseline_preserved_pcb_via_85",
    "baseline_preserved_pcb_via_86",
    "baseline_preserved_pcb_via_87",
    "baseline_preserved_pcb_via_88",
    "baseline_preserved_pcb_via_89",
    "baseline_preserved_pcb_via_90",
    "baseline_preserved_pcb_via_91",
    "baseline_preserved_pcb_via_92",
    "baseline_preserved_pcb_via_93",
    "baseline_ram_decap_C_RAM_0_1_via",
    "baseline_ram_decap_C_RAM_1_1_via",
    "baseline_ram_decap_C_RAM_2_1_via",
    "baseline_ram_decap_C_RAM_3_1_via",
    "baseline_ram_decap_C_RAM_4_1_via",
    "baseline_ram_decap_C_RAM_5_1_via",
    "baseline_ram_decap_C_RAM_6_1_via",
    "baseline_ram_decap_C_RAM_7_1_via",
    "baseline_ram_decap_C_RAM_8_1_via",
    "baseline_ram_decap_C_RAM_9_1_via",
    "baseline_ram_decap_C_RAM_10_1_via",
    "baseline_ram_decap_C_RAM_11_1_via",
    "baseline_support_via_U3_F1",
    "baseline_support_via_U3_K8",
    "baseline_support_via_U3_D9",
    "baseline_support_via_U1_J3",
    "baseline_support_via_U1_J4",
    "baseline_support_via_U3_H1",
    "baseline_support_via_U3_L8",
    "baseline_support_via_U3_M8",
    "baseline_support_via_U1_E5",
    "baseline_support_via_U1_F5",
    "baseline_support_via_U1_G5",
    "baseline_support_via_U1_H5",
    "baseline_support_via_U1_J5",
    "baseline_support_via_U1_K5",
    "baseline_support_via_U1_L5",
    "baseline_support_via_U3_A1",
    "baseline_support_via_U3_C1",
    "baseline_support_via_U3_N1",
    "baseline_support_via_U3_R1",
    "baseline_support_via_U3_B2",
    "baseline_support_via_U3_H2",
    "baseline_support_via_U3_G7",
    "baseline_support_via_U3_A8",
    "baseline_support_via_U3_E9",
    "baseline_support_via_U3_H9",
    "baseline_support_via_U3_N9",
    "baseline_support_via_U3_R9",
    "baseline_reset_ijump_a3c6bd23_13_via_7",
    "baseline_plane_tie_DDR_1V5_0dee7f1d_0_via",
    "baseline_plane_tie_DDR_1V5_0dee7f1d_2_via",
    "baseline_plane_tie_DDR_1V5_0dee7f1d_4_via",
    "baseline_plane_tie_DDR_1V5_0dee7f1d_6_via",
    "baseline_plane_tie_DDR_1V5_0dee7f1d_8_via",
    "baseline_ddr_cap_4c88c897_pcb_port_699_via",
    "baseline_ddr_cap_4c88c897_pcb_port_701_via",
    "baseline_ddr_cap_4c88c897_pcb_port_703_via",
    "baseline_ddr_cap_4c88c897_pcb_port_917_via",
    "baseline_ddr_cap_4c88c897_pcb_port_921_via",
    "baseline_ddr_cap_4c88c897_pcb_port_925_via",
    "baseline_ddr_cap_4c88c897_pcb_port_927_via",
    "baseline_ddr_cap_4c88c897_pcb_port_929_via",
    "baseline_ddr_cap_4c88c897_pcb_port_931_via",
    "baseline_ddr_cap_4c88c897_pcb_port_705_via",
    "baseline_ddr_cap_4c88c897_pcb_port_913_via",
    "baseline_ddr_cap_4c88c897_pcb_port_915_via",
    "baseline_ddr_cap_d36217b1_pcb_port_923_via",
    "baseline_ddr_cap_d36217b1_pcb_port_707_via",
    "baseline_ddr_cap_d36217b1_pcb_port_905_via",
    "baseline_ddr_cap_d36217b1_pcb_port_907_via",
    "baseline_ddr_cap_d36217b1_pcb_port_911_via",
    "baseline_ddr_cap_711ac343_pcb_port_909_via",
    "baseline_ddr_cap_222cd283_pcb_port_919_via",
    "baseline_reset_ijump_d886ba68_2_via_5",
    "baseline_reset_ijump_d886ba68_2_via_20",
    "baseline_reset_ijump_d886ba68_4_via_4",
    "baseline_reset_ijump_d886ba68_4_via_8",
    "baseline_vtp_l3_2f2819c3_via",
    "baseline_ddr_cap_4c88c897_pcb_port_933_via",
    "baseline_processor_feed_0b682182_0_load_DDR_1V5_via",
    "baseline_processor_feed_0b682182_1_load_DDR_1V5_via",
    "baseline_processor_feed_0b682182_2_load_DDR_1V5_via",
    "baseline_north_feedback_17787539_DDR_1V5_via",
    "baseline_closure_bf77cf69_R_DDR_RESET_pin2_tap0_via_0",
    "baseline_reset_ijump_f9f37ff3_0_via_9",
    "baseline_reset_ijump_f9f37ff3_0_via_47",
    "ca_bridge_DDR_WEn_0",
    "ca_bridge_DDR_A3_0",
    "ca_bridge_DDR_A6_0",
    "ca_bridge_DDR_A0_0",
    "ca_bridge_DDR_A10_0",
    "ca_bridge_DDR_A11_0",
    "ca_bridge_DDR_A11_1",
    "ca_bridge_DDR_RASn_0",
    "ca_bridge_DDR_A7_0",
    "ca_bridge_DDR_A7_1",
    "ca_bridge_DDR_ODT_0",
    "ca_bridge_DDR_CASn_0",
    "ca_bridge_DDR_CASn_1"
  ],
  "unchanged_actual_TX_records": 64,
  "unchanged_actual_TX_terminal_guards": 24,
  "unchanged_ground_vias": 65,
  "actual_ground_reference_layer_contacts_verified": 130,
  "ground_reference_failures": [],
  "new_ground_reference_report": "outputs/am3352-ddr/hdmi/validation-next/power-widening/new-ground-references.json",
  "all_required_physical_terminal_partitions_exactly_equal": true,
  "remaining_joins_before": 55,
  "remaining_joins_after": 55,
  "shorts_before": 0,
  "shorts_after": 0
}