tscircuit/autorouting-dataset-01
This code manages the hardware and electronic components for circuit design and PCB layout, defining components like resistors, capacitors, transistors, connectors, and footprints, and providing tools for component placement, PCB topology, and electrical connections.
- Version
- 1.0.102
- License
- unset
- Stars
- 4
dist/lib/circuit/circuit195/circuit.json
PCB
Schematic
[
{
"type": "source_group",
"source_group_id": "source_group_0",
"is_subcircuit": true,
"was_automatically_named": true,
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_0",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_port",
"source_port_id": "source_port_1",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_component",
"source_component_id": "source_component_0",
"ftype": "simple_resistor",
"name": "resistor-1",
"supplier_part_numbers": {
"jlcpcb": [
"C21190",
"C2907002",
"C2907113"
]
},
"resistance": 1000,
"display_resistance": "1kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_2",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_port",
"source_port_id": "source_port_3",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_component",
"source_component_id": "source_component_1",
"ftype": "simple_resistor",
"name": "resistor-2",
"supplier_part_numbers": {
"jlcpcb": [
"C21190",
"C2907002",
"C2907113"
]
},
"resistance": 1000,
"display_resistance": "1kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_4",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_port",
"source_port_id": "source_port_5",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_component",
"source_component_id": "source_component_2",
"ftype": "simple_resistor",
"name": "resistor-3",
"supplier_part_numbers": {
"jlcpcb": [
"C17513",
"C2907295",
"C25623"
]
},
"resistance": 1000,
"display_resistance": "1kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_6",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"1",
"left"
],
"source_component_id": "source_component_3",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_port",
"source_port_id": "source_port_7",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"2",
"right"
],
"source_component_id": "source_component_3",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_component",
"source_component_id": "source_component_3",
"ftype": "simple_capacitor",
"name": "capacitor-1",
"supplier_part_numbers": {
"jlcpcb": [
"C49678",
"C28233",
"C1711"
]
},
"capacitance": 1e-7,
"display_capacitance": "0.1uF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_8",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"left",
"1"
],
"source_component_id": "source_component_4",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_port",
"source_port_id": "source_port_9",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"right",
"2"
],
"source_component_id": "source_component_4",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_component",
"source_component_id": "source_component_4",
"ftype": "simple_diode",
"name": "diode-1",
"supplier_part_numbers": {
"jlcpcb": []
},
"are_pins_interchangeable": false,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_10",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"left",
"1"
],
"source_component_id": "source_component_5",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_port",
"source_port_id": "source_port_11",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"right",
"2"
],
"source_component_id": "source_component_5",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_component",
"source_component_id": "source_component_5",
"ftype": "simple_diode",
"name": "diode-2",
"supplier_part_numbers": {
"jlcpcb": []
},
"are_pins_interchangeable": false,
"source_group_id": "source_group_0"
},
{
"type": "source_net",
"source_net_id": "source_net_0",
"name": "N2",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_net",
"source_net_id": "source_net_1",
"name": "N3",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_net",
"source_net_id": "source_net_2",
"name": "N1",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_board",
"source_board_id": "source_board_0",
"source_group_id": "source_group_0"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component resistor-1 has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_0",
"refdes": "resistor-1",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RESISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_0"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component resistor-2 has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_1",
"refdes": "resistor-2",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RESISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_1"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component resistor-3 has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_2",
"refdes": "resistor-3",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RESISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_2"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component capacitor-1 has ftype=\"simple_capacitor\" but reference designator should start with C",
"source_component_id": "source_component_3",
"refdes": "capacitor-1",
"source_component_ftype": "simple_capacitor",
"expected_prefixes": [
"C"
],
"actual_prefix": "CAPACITOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_3"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component diode-1 has ftype=\"simple_diode\" but reference designator should start with D",
"source_component_id": "source_component_4",
"refdes": "diode-1",
"source_component_ftype": "simple_diode",
"expected_prefixes": [
"D"
],
"actual_prefix": "DIODE",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_4"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component diode-2 has ftype=\"simple_diode\" but reference designator should start with D",
"source_component_id": "source_component_5",
"refdes": "diode-2",
"source_component_ftype": "simple_diode",
"expected_prefixes": [
"D"
],
"actual_prefix": "DIODE",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_5"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_0",
"connected_source_port_ids": [
"source_port_1"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-1 > .pin2 to net.N2",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_0",
"message": "<trace#21041(from:.resistor-1 > .pin2 to:net.N2) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_0",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_1",
"connected_source_port_ids": [
"source_port_0"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-1 > .pin1 to net.N3",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_1",
"message": "<trace#21042(from:.resistor-1 > .pin1 to:net.N3) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_1",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_2",
"connected_source_port_ids": [
"source_port_2"
],
"connected_source_net_ids": [
"source_net_2"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-2 > .pin1 to net.N1",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_2",
"message": "<trace#21043(from:.resistor-2 > .pin1 to:net.N1) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_2",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_3",
"connected_source_port_ids": [
"source_port_3"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-2 > .pin2 to net.N3",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_3",
"message": "<trace#21044(from:.resistor-2 > .pin2 to:net.N3) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_3",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_4",
"connected_source_port_ids": [
"source_port_4"
],
"connected_source_net_ids": [
"source_net_2"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-3 > .pin1 to net.N1",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_4",
"message": "<trace#21045(from:.resistor-3 > .pin1 to:net.N1) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_4",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_5",
"connected_source_port_ids": [
"source_port_5"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-3 > .pin2 to net.N2",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_5",
"message": "<trace#21046(from:.resistor-3 > .pin2 to:net.N2) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_5",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_6",
"connected_source_port_ids": [
"source_port_7"
],
"connected_source_net_ids": [
"source_net_2"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-1 > .pin2 to net.N1",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_6",
"message": "<trace#21047(from:.capacitor-1 > .pin2 to:net.N1) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_6",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_7",
"connected_source_port_ids": [
"source_port_6"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-1 > .pin1 to net.N2",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_7",
"message": "<trace#21048(from:.capacitor-1 > .pin1 to:net.N2) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_7",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_8",
"connected_source_port_ids": [
"source_port_9"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".diode-1 > .pin2 to net.N2",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_8",
"message": "<trace#21049(from:.diode-1 > .pin2 to:net.N2) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_8",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_9",
"connected_source_port_ids": [
"source_port_8"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".diode-1 > .pin1 to net.N3",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_9",
"message": "<trace#21050(from:.diode-1 > .pin1 to:net.N3) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_9",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_10",
"connected_source_port_ids": [
"source_port_10"
],
"connected_source_net_ids": [
"source_net_2"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".diode-2 > .pin1 to net.N1",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_10",
"message": "<trace#21051(from:.diode-2 > .pin1 to:net.N1) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_10",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_11",
"connected_source_port_ids": [
"source_port_11"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".diode-2 > .pin2 to net.N3",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_11",
"message": "<trace#21052(from:.diode-2 > .pin2 to:net.N3) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_11",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_0",
"center": {
"x": 0,
"y": 0
},
"size": {
"width": 0.6,
"height": 0.65
},
"source_component_id": "source_component_0",
"is_box_with_pins": true,
"symbol_name": "boxresistor_right",
"symbol_display_value": "1kΩ",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_1",
"center": {
"x": 0,
"y": -1.88
},
"size": {
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},
"font": "tscircuit2024",
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"text": "-",
"pcb_component_id": "pcb_component_5",
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "pcb_silkscreen_text",
"pcb_silkscreen_text_id": "pcb_silkscreen_text_5",
"anchor_alignment": "center",
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"y": 0.7050000000000001
},
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"layer": "top",
"text": "diode-2",
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"pcb_component_id": "pcb_component_5",
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "pcb_courtyard_rect",
"pcb_courtyard_rect_id": "pcb_courtyard_rect_5",
"pcb_component_id": "pcb_component_5",
"layer": "top",
"center": {
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},
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},
{
"type": "pcb_port",
"pcb_port_id": "pcb_port_0",
"pcb_component_id": "pcb_component_0",
"layers": [
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],
"subcircuit_id": "subcircuit_source_group_0",
"x": 0.675,
"y": -4,
"source_port_id": "source_port_0"
},
{
"type": "pcb_port",
"pcb_port_id": "pcb_port_1",
"pcb_component_id": "pcb_component_0",
"layers": [
"top"
],
"subcircuit_id": "subcircuit_source_group_0",
"x": 2.325,
"y": -4,
"source_port_id": "source_port_1"
},
{
"type": "pcb_port",
"pcb_port_id": "pcb_port_2",
"pcb_component_id": "pcb_component_1",
"layers": [
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],
"subcircuit_id": "subcircuit_source_group_0",
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"y": 1,
"source_port_id": "source_port_2"
},
{
"type": "pcb_port",
"pcb_port_id": "pcb_port_3",
"pcb_component_id": "pcb_component_1",
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],
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"source_port_id": "source_port_3"
},
{
"type": "pcb_port",
"pcb_port_id": "pcb_port_4",
"pcb_component_id": "pcb_component_2",
"layers": [
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],
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},
{
"type": "pcb_port",
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"layers": [
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],
"subcircuit_id": "subcircuit_source_group_0",
"x": -3.5,
"y": -5.0875,
"source_port_id": "source_port_5"
},
{
"type": "pcb_port",
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"pcb_component_id": "pcb_component_3",
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],
"subcircuit_id": "subcircuit_source_group_0",
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"source_port_id": "source_port_6"
},
{
"type": "pcb_port",
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"layers": [
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],
"subcircuit_id": "subcircuit_source_group_0",
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"source_port_id": "source_port_7"
},
{
"type": "pcb_port",
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"layers": [
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],
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"source_port_id": "source_port_8"
},
{
"type": "pcb_port",
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],
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"source_port_id": "source_port_9"
},
{
"type": "pcb_port",
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"layers": [
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],
"subcircuit_id": "subcircuit_source_group_0",
"x": -4.15,
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"source_port_id": "source_port_10"
},
{
"type": "pcb_port",
"pcb_port_id": "pcb_port_11",
"pcb_component_id": "pcb_component_5",
"layers": [
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],
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},
{
"type": "cad_component",
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},
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},
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"source_component_id": "source_component_0",
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"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "res0603"
},
{
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},
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},
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"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "res0603"
},
{
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},
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},
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"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "res0805"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_3",
"position": {
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},
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},
"pcb_component_id": "pcb_component_3",
"source_component_id": "source_component_3",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "cap0805"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_4",
"position": {
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},
"rotation": {
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},
"pcb_component_id": "pcb_component_4",
"source_component_id": "source_component_4",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "sod323"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_5",
"position": {
"x": -2.5000000000000004,
"y": 0,
"z": 0.7
},
"rotation": {
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"y": 0,
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},
"pcb_component_id": "pcb_component_5",
"source_component_id": "source_component_5",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "sod123"
},
{
"type": "source_project_metadata",
"source_filesystem_md5_hash": "3fbdf5adbcca5810255d1c815ce964f6"
}
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