tscircuit/autorouting-dataset-01
This code manages the hardware and electronic components for circuit design and PCB layout, defining components like resistors, capacitors, transistors, connectors, and footprints, and providing tools for component placement, PCB topology, and electrical connections.
- Version
- 1.0.102
- License
- unset
- Stars
- 4
dist/lib/circuit/circuit147/circuit.json
PCB
Schematic
[
{
"type": "source_group",
"source_group_id": "source_group_0",
"is_subcircuit": true,
"was_automatically_named": true,
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_0",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_port",
"source_port_id": "source_port_1",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_component",
"source_component_id": "source_component_0",
"name": "inductor-1",
"ftype": "simple_inductor",
"inductance": "10uH",
"display_inductance": "10µH",
"supplier_part_numbers": {
"jlcpcb": []
},
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_2",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"collector",
"c",
"1"
],
"source_component_id": "source_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_port",
"source_port_id": "source_port_3",
"name": "pin3",
"pin_number": 3,
"port_hints": [
"pin3",
"emitter",
"e",
"3"
],
"source_component_id": "source_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_port",
"source_port_id": "source_port_4",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"base",
"b",
"2"
],
"source_component_id": "source_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_component",
"source_component_id": "source_component_1",
"ftype": "simple_transistor",
"name": "transistor-1",
"supplier_part_numbers": {
"jlcpcb": []
},
"transistor_type": "mosfet",
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_5",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"collector",
"c",
"1"
],
"source_component_id": "source_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_port",
"source_port_id": "source_port_6",
"name": "pin3",
"pin_number": 3,
"port_hints": [
"pin3",
"emitter",
"e",
"3"
],
"source_component_id": "source_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_port",
"source_port_id": "source_port_7",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"base",
"b",
"2"
],
"source_component_id": "source_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_component",
"source_component_id": "source_component_2",
"ftype": "simple_transistor",
"name": "transistor-2",
"supplier_part_numbers": {
"jlcpcb": []
},
"transistor_type": "jfet",
"source_group_id": "source_group_0"
},
{
"type": "source_net",
"source_net_id": "source_net_0",
"name": "N1",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_net",
"source_net_id": "source_net_1",
"name": "N2",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_net",
"source_net_id": "source_net_2",
"name": "N3",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_net",
"source_net_id": "source_net_3",
"name": "N4",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_board",
"source_board_id": "source_board_0",
"source_group_id": "source_group_0"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component inductor-1 has ftype=\"simple_inductor\" but reference designator should start with one of L, FB",
"source_component_id": "source_component_0",
"refdes": "inductor-1",
"source_component_ftype": "simple_inductor",
"expected_prefixes": [
"L",
"FB"
],
"actual_prefix": "INDUCTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_0"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component transistor-1 has ftype=\"simple_transistor\" but reference designator should start with Q",
"source_component_id": "source_component_1",
"refdes": "transistor-1",
"source_component_ftype": "simple_transistor",
"expected_prefixes": [
"Q"
],
"actual_prefix": "TRANSISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_1"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component transistor-2 has ftype=\"simple_transistor\" but reference designator should start with Q",
"source_component_id": "source_component_2",
"refdes": "transistor-2",
"source_component_ftype": "simple_transistor",
"expected_prefixes": [
"Q"
],
"actual_prefix": "TRANSISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_2"
},
{
"type": "source_invalid_component_property_error",
"source_invalid_component_property_error_id": "source_invalid_component_property_error_0",
"source_component_id": "source_component_1",
"property_name": "footprint",
"message": "Invalid footprint prop on transistor \"transistor-1\": \"SOT-223\". Parser details: [\n {\n \"received\": -223,\n \"code\": \"invalid_literal\",\n \"expected\": 6,\n \"path\": [\n \"num_pins\"\n ],\n \"message\": \"Invalid literal value, expected 6\"\n }\n]",
"error_type": "source_invalid_component_property_error"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_0",
"connected_source_port_ids": [
"source_port_1"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".inductor-1 > .pin2 to net.N1",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_0",
"message": "<trace#9932(from:.inductor-1 > .pin2 to:net.N1) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_0",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_1",
"connected_source_port_ids": [
"source_port_0"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".inductor-1 > .pin1 to net.N2",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_1",
"message": "<trace#9933(from:.inductor-1 > .pin1 to:net.N2) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_1",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_2",
"connected_source_port_ids": [
"source_port_3"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-1 > .pin3 to net.N2",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_2",
"message": "<trace#9934(from:.transistor-1 > .pin3 to:net.N2) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_2",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_3",
"connected_source_port_ids": [
"source_port_4"
],
"connected_source_net_ids": [
"source_net_2"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-1 > .pin2 to net.N3",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_3",
"message": "<trace#9935(from:.transistor-1 > .pin2 to:net.N3) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_3",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_4",
"connected_source_port_ids": [
"source_port_2"
],
"connected_source_net_ids": [
"source_net_3"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-1 > .pin1 to net.N4",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_4",
"message": "<trace#9936(from:.transistor-1 > .pin1 to:net.N4) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_4",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_5",
"connected_source_port_ids": [
"source_port_5"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-2 > .pin1 to net.N1",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_5",
"message": "<trace#9937(from:.transistor-2 > .pin1 to:net.N1) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_5",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_6",
"connected_source_port_ids": [
"source_port_7"
],
"connected_source_net_ids": [
"source_net_2"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-2 > .pin2 to net.N3",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_6",
"message": "<trace#9938(from:.transistor-2 > .pin2 to:net.N3) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_6",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_7",
"connected_source_port_ids": [
"source_port_6"
],
"connected_source_net_ids": [
"source_net_3"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-2 > .pin3 to net.N4",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_7",
"message": "<trace#9939(from:.transistor-2 > .pin3 to:net.N4) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_7",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_0",
"center": {
"x": 0,
"y": -4.078870350000001
},
"size": {
"width": 1.0555194999999997,
"height": 0.4599472908242199
},
"source_component_id": "source_component_0",
"is_box_with_pins": true,
"symbol_name": "inductor_right",
"symbol_display_value": "10µH",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_1",
"center": {
"x": 0,
"y": 0
},
"size": {
"width": 1.1,
"height": 0.8300000000000001
},
"source_component_id": "source_component_1",
"is_box_with_pins": true,
"symbol_name": "pnp_bipolar_transistor_right",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_2",
"center": {
"x": 0,
"y": -2.0300000000000002
},
"size": {
"width": 1.1,
"height": 0.8300000000000001
},
"source_component_id": "source_component_2",
"is_box_with_pins": true,
"symbol_name": "pnp_bipolar_transistor_right",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_group",
"schematic_group_id": "schematic_group_0",
"is_subcircuit": true,
"subcircuit_id": "subcircuit_source_group_0",
"name": "unnamed_board1",
"center": {
"x": 0,
"y": 0
},
"width": 0,
"height": 0,
"schematic_component_ids": [],
"source_group_id": "source_group_0",
"show_as_schematic_box": false
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_0",
"schematic_component_id": "schematic_component_0",
"center": {
"x": -0.5279125,
"y": -4.076245800000001
},
"source_port_id": "source_port_0",
"facing_direction": "left",
"distance_from_component_edge": 0.4,
"pin_number": 1,
"display_pin_label": "anode",
"is_connected": false
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_1",
"schematic_component_id": "schematic_component_0",
"center": {
"x": 0.5279125,
"y": -4.081494900000001
},
"source_port_id": "source_port_1",
"facing_direction": "right",
"distance_from_component_edge": 0.4,
"pin_number": 2,
"display_pin_label": "cathode",
"is_connected": false
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_2",
"schematic_component_id": "schematic_component_1",
"center": {
"x": -0.55,
"y": 0.29000000000000004
},
"source_port_id": "source_port_2",
"facing_direction": "left",
"distance_from_component_edge": 0.4,
"pin_number": 1,
"display_pin_label": "collector",
"is_connected": false
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_3",
"schematic_component_id": "schematic_component_1",
"center": {
"x": 0.55,
"y": 0.2899999999999999
},
"source_port_id": "source_port_3",
"facing_direction": "right",
"distance_from_component_edge": 0.4,
"pin_number": 3,
"display_pin_label": "emitter",
"is_connected": false
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_4",
"schematic_component_id": "schematic_component_1",
"center": {
"x": -2.4492935982947065e-17,
"y": -0.4
},
"source_port_id": "source_port_4",
"facing_direction": "down",
"distance_from_component_edge": 0.4,
"pin_number": 2,
"display_pin_label": "base",
"is_connected": true
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_5",
"schematic_component_id": "schematic_component_2",
"center": {
"x": -0.55,
"y": -1.7400000000000002
},
"source_port_id": "source_port_5",
"facing_direction": "left",
"distance_from_component_edge": 0.4,
"pin_number": 1,
"display_pin_label": "collector",
"is_connected": false
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_6",
"schematic_component_id": "schematic_component_2",
"center": {
"x": 0.55,
"y": -1.7400000000000002
},
"source_port_id": "source_port_6",
"facing_direction": "right",
"distance_from_component_edge": 0.4,
"pin_number": 3,
"display_pin_label": "emitter",
"is_connected": false
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_7",
"schematic_component_id": "schematic_component_2",
"center": {
"x": -2.4492935982947065e-17,
"y": -2.43
},
"source_port_id": "source_port_7",
"facing_direction": "down",
"distance_from_component_edge": 0.4,
"pin_number": 2,
"display_pin_label": "base",
"is_connected": true
},
{
"type": "schematic_trace",
"schematic_trace_id": "schematic_trace_0",
"source_trace_id": "schematic_port_4-schematic_port_7",
"edges": [
{
"from": {
"x": -2.4492935982947065e-17,
"y": -0.4
},
"to": {
"x": -2.4492935982947065e-17,
"y": -0.41500000000000004
}
},
{
"from": {
"x": -2.4492935982947065e-17,
"y": -0.41500000000000004
},
"to": {
"x": -2.4492935982947065e-17,
"y": -0.6150000000000002
}
},
{
"from": {
"x": -2.4492935982947065e-17,
"y": -0.6150000000000002
},
"to": {
"x": -1.0110000000000001,
"y": -0.6150000000000002
}
},
{
"from": {
"x": -1.0110000000000001,
"y": -0.6150000000000002
},
"to": {
"x": -1.0110000000000001,
"y": -2.6450000000000005
}
},
{
"from": {
"x": -1.0110000000000001,
"y": -2.6450000000000005
},
"to": {
"x": -2.4492935982947065e-17,
"y": -2.6450000000000005
}
},
{
"from": {
"x": -2.4492935982947065e-17,
"y": -2.6450000000000005
},
"to": {
"x": -2.4492935982947065e-17,
"y": -2.4450000000000003
}
},
{
"from": {
"x": -2.4492935982947065e-17,
"y": -2.4450000000000003
},
"to": {
"x": -2.4492935982947065e-17,
"y": -2.43
}
}
],
"junctions": [],
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "schematic_net_label",
"schematic_net_label_id": "schematic_net_label_0",
"text": "N2",
"source_net_id": "source_net_1",
"anchor_position": {
"x": -0.5279125,
"y": -4.076245800000001
},
"center": {
"x": -0.7079125,
"y": -4.076245800000001
},
"anchor_side": "right"
},
{
"type": "schematic_net_label",
"schematic_net_label_id": "schematic_net_label_1",
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