tscircuit/autorouting-dataset-01
This code manages the hardware and electronic components for circuit design and PCB layout, defining components like resistors, capacitors, transistors, connectors, and footprints, and providing tools for component placement, PCB topology, and electrical connections.
- Version
- 1.0.102
- License
- unset
- Stars
- 4
dist/lib/circuit/circuit113/circuit.json
PCB
Schematic
[
{
"type": "source_group",
"source_group_id": "source_group_0",
"is_subcircuit": true,
"was_automatically_named": true,
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_0",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_port",
"source_port_id": "source_port_1",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_component",
"source_component_id": "source_component_0",
"ftype": "simple_resistor",
"name": "resistor-1",
"supplier_part_numbers": {
"jlcpcb": [
"C11702",
"C25543",
"C2906864"
]
},
"resistance": 1000,
"display_resistance": "1kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_2",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_port",
"source_port_id": "source_port_3",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_component",
"source_component_id": "source_component_1",
"ftype": "simple_resistor",
"name": "resistor-2",
"supplier_part_numbers": {
"jlcpcb": [
"C11702",
"C25543",
"C2906864"
]
},
"resistance": 1000,
"display_resistance": "1kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_4",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_port",
"source_port_id": "source_port_5",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_component",
"source_component_id": "source_component_2",
"ftype": "simple_resistor",
"name": "resistor-3",
"supplier_part_numbers": {
"jlcpcb": [
"C21190",
"C2907002",
"C2907113"
]
},
"resistance": 1000,
"display_resistance": "1kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_6",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_3",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_port",
"source_port_id": "source_port_7",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_3",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_component",
"source_component_id": "source_component_3",
"ftype": "simple_resistor",
"name": "resistor-4",
"supplier_part_numbers": {
"jlcpcb": [
"C17513",
"C2907295",
"C25623"
]
},
"resistance": 1000,
"display_resistance": "1kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_8",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_4",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_port",
"source_port_id": "source_port_9",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_4",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_component",
"source_component_id": "source_component_4",
"ftype": "simple_resistor",
"name": "resistor-5",
"supplier_part_numbers": {
"jlcpcb": [
"C11702",
"C25543",
"C2906864"
]
},
"resistance": 1000,
"display_resistance": "1kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_10",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"1",
"left"
],
"source_component_id": "source_component_5",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_port",
"source_port_id": "source_port_11",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"2",
"right"
],
"source_component_id": "source_component_5",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_component",
"source_component_id": "source_component_5",
"ftype": "simple_capacitor",
"name": "capacitor-1",
"supplier_part_numbers": {
"jlcpcb": [
"C1525",
"C307331",
"C60474"
]
},
"capacitance": 1e-7,
"display_capacitance": "0.1uF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_12",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"1",
"left"
],
"source_component_id": "source_component_6",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_port",
"source_port_id": "source_port_13",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"2",
"right"
],
"source_component_id": "source_component_6",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_component",
"source_component_id": "source_component_6",
"ftype": "simple_capacitor",
"name": "capacitor-2",
"supplier_part_numbers": {
"jlcpcb": [
"C49678",
"C28233",
"C1711"
]
},
"capacitance": 1e-7,
"display_capacitance": "0.1uF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_14",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"1",
"left"
],
"source_component_id": "source_component_7",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_port",
"source_port_id": "source_port_15",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"2",
"right"
],
"source_component_id": "source_component_7",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_component",
"source_component_id": "source_component_7",
"ftype": "simple_capacitor",
"name": "capacitor-3",
"supplier_part_numbers": {
"jlcpcb": [
"C1525",
"C307331",
"C60474"
]
},
"capacitance": 1e-7,
"display_capacitance": "0.1uF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_16",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"1",
"left"
],
"source_component_id": "source_component_8",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_port",
"source_port_id": "source_port_17",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"2",
"right"
],
"source_component_id": "source_component_8",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_component",
"source_component_id": "source_component_8",
"ftype": "simple_capacitor",
"name": "capacitor-4",
"supplier_part_numbers": {
"jlcpcb": [
"C1525",
"C307331",
"C60474"
]
},
"capacitance": 1e-7,
"display_capacitance": "0.1uF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_18",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_9",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_port",
"source_port_id": "source_port_19",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_9",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_component",
"source_component_id": "source_component_9",
"name": "inductor-1",
"ftype": "simple_inductor",
"inductance": "10uH",
"display_inductance": "10µH",
"supplier_part_numbers": {
"jlcpcb": []
},
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_20",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"left",
"1"
],
"source_component_id": "source_component_10",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_port",
"source_port_id": "source_port_21",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"right",
"2"
],
"source_component_id": "source_component_10",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_component",
"source_component_id": "source_component_10",
"ftype": "simple_diode",
"name": "diode-1",
"supplier_part_numbers": {
"jlcpcb": []
},
"are_pins_interchangeable": false,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_22",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"left",
"1"
],
"source_component_id": "source_component_11",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_port",
"source_port_id": "source_port_23",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"right",
"2"
],
"source_component_id": "source_component_11",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_component",
"source_component_id": "source_component_11",
"ftype": "simple_diode",
"name": "diode-2",
"supplier_part_numbers": {
"jlcpcb": []
},
"are_pins_interchangeable": false,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_24",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"collector",
"c",
"1"
],
"source_component_id": "source_component_12",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_port",
"source_port_id": "source_port_25",
"name": "pin3",
"pin_number": 3,
"port_hints": [
"pin3",
"emitter",
"e",
"3"
],
"source_component_id": "source_component_12",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_port",
"source_port_id": "source_port_26",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"base",
"b",
"2"
],
"source_component_id": "source_component_12",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_component",
"source_component_id": "source_component_12",
"ftype": "simple_transistor",
"name": "transistor-1",
"supplier_part_numbers": {
"jlcpcb": []
},
"transistor_type": "pnp",
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_27",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"1"
],
"source_component_id": "source_component_13",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_port",
"source_port_id": "source_port_28",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"2"
],
"source_component_id": "source_component_13",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_port",
"source_port_id": "source_port_29",
"name": "pin3",
"pin_number": 3,
"port_hints": [
"pin3",
"3"
],
"source_component_id": "source_component_13",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_port",
"source_port_id": "source_port_30",
"name": "pin4",
"pin_number": 4,
"port_hints": [
"pin4",
"4"
],
"source_component_id": "source_component_13",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_port",
"source_port_id": "source_port_31",
"name": "pin5",
"pin_number": 5,
"port_hints": [
"pin5",
"5"
],
"source_component_id": "source_component_13",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_port",
"source_port_id": "source_port_32",
"name": "pin6",
"pin_number": 6,
"port_hints": [
"pin6",
"6"
],
"source_component_id": "source_component_13",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_port",
"source_port_id": "source_port_33",
"name": "pin7",
"pin_number": 7,
"port_hints": [
"pin7",
"7"
],
"source_component_id": "source_component_13",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_port",
"source_port_id": "source_port_34",
"name": "pin8",
"pin_number": 8,
"port_hints": [
"pin8",
"8"
],
"source_component_id": "source_component_13",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_component",
"source_component_id": "source_component_13",
"ftype": "simple_chip",
"name": "chip-1",
"manufacturer_part_number": "GENERIC",
"supplier_part_numbers": {
"jlcpcb": []
},
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_35",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"1"
],
"source_component_id": "source_component_14",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_port",
"source_port_id": "source_port_36",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"2"
],
"source_component_id": "source_component_14",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_port",
"source_port_id": "source_port_37",
"name": "pin3",
"pin_number": 3,
"port_hints": [
"pin3",
"3"
],
"source_component_id": "source_component_14",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_port",
"source_port_id": "source_port_38",
"name": "pin4",
"pin_number": 4,
"port_hints": [
"pin4",
"4"
],
"source_component_id": "source_component_14",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_port",
"source_port_id": "source_port_39",
"name": "pin5",
"pin_number": 5,
"port_hints": [
"pin5",
"5"
],
"source_component_id": "source_component_14",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_port",
"source_port_id": "source_port_40",
"name": "pin6",
"pin_number": 6,
"port_hints": [
"pin6",
"6"
],
"source_component_id": "source_component_14",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_component",
"source_component_id": "source_component_14",
"ftype": "simple_pin_header",
"name": "pinhead-1",
"supplier_part_numbers": {
"jlcpcb": [
"C492420",
"C492414",
"C37208"
]
},
"pin_count": 6,
"gender": "male",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_net",
"source_net_id": "source_net_0",
"name": "N4",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_net",
"source_net_id": "source_net_1",
"name": "N5",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_net",
"source_net_id": "source_net_2",
"name": "N1",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_net",
"source_net_id": "source_net_3",
"name": "N12",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_net",
"source_net_id": "source_net_4",
"name": "N6",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_net",
"source_net_id": "source_net_5",
"name": "N10",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_net",
"source_net_id": "source_net_6",
"name": "N2",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_net",
"source_net_id": "source_net_7",
"name": "N3",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_net",
"source_net_id": "source_net_8",
"name": "N11",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_net",
"source_net_id": "source_net_9",
"name": "N13",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_net",
"source_net_id": "source_net_10",
"name": "N7",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_net",
"source_net_id": "source_net_11",
"name": "N8",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_net",
"source_net_id": "source_net_12",
"name": "N9",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_board",
"source_board_id": "source_board_0",
"source_group_id": "source_group_0"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component resistor-1 has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_0",
"refdes": "resistor-1",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RESISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_0"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component resistor-2 has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_1",
"refdes": "resistor-2",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RESISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_1"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component resistor-3 has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_2",
"refdes": "resistor-3",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RESISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_2"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component resistor-4 has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_3",
"refdes": "resistor-4",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RESISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_3"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component resistor-5 has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_4",
"refdes": "resistor-5",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RESISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_4"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component capacitor-1 has ftype=\"simple_capacitor\" but reference designator should start with C",
"source_component_id": "source_component_5",
"refdes": "capacitor-1",
"source_component_ftype": "simple_capacitor",
"expected_prefixes": [
"C"
],
"actual_prefix": "CAPACITOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_5"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component capacitor-2 has ftype=\"simple_capacitor\" but reference designator should start with C",
"source_component_id": "source_component_6",
"refdes": "capacitor-2",
"source_component_ftype": "simple_capacitor",
"expected_prefixes": [
"C"
],
"actual_prefix": "CAPACITOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_6"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component capacitor-3 has ftype=\"simple_capacitor\" but reference designator should start with C",
"source_component_id": "source_component_7",
"refdes": "capacitor-3",
"source_component_ftype": "simple_capacitor",
"expected_prefixes": [
"C"
],
"actual_prefix": "CAPACITOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_7"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component capacitor-4 has ftype=\"simple_capacitor\" but reference designator should start with C",
"source_component_id": "source_component_8",
"refdes": "capacitor-4",
"source_component_ftype": "simple_capacitor",
"expected_prefixes": [
"C"
],
"actual_prefix": "CAPACITOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_8"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component inductor-1 has ftype=\"simple_inductor\" but reference designator should start with one of L, FB",
"source_component_id": "source_component_9",
"refdes": "inductor-1",
"source_component_ftype": "simple_inductor",
"expected_prefixes": [
"L",
"FB"
],
"actual_prefix": "INDUCTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_9"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component diode-1 has ftype=\"simple_diode\" but reference designator should start with D",
"source_component_id": "source_component_10",
"refdes": "diode-1",
"source_component_ftype": "simple_diode",
"expected_prefixes": [
"D"
],
"actual_prefix": "DIODE",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_10"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component diode-2 has ftype=\"simple_diode\" but reference designator should start with D",
"source_component_id": "source_component_11",
"refdes": "diode-2",
"source_component_ftype": "simple_diode",
"expected_prefixes": [
"D"
],
"actual_prefix": "DIODE",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_11"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component transistor-1 has ftype=\"simple_transistor\" but reference designator should start with Q",
"source_component_id": "source_component_12",
"refdes": "transistor-1",
"source_component_ftype": "simple_transistor",
"expected_prefixes": [
"Q"
],
"actual_prefix": "TRANSISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_12"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "The \"C\" prefix is being used with a <chip />, try using it with a <capacitor />",
"source_component_id": "source_component_13",
"refdes": "chip-1",
"source_component_ftype": "simple_chip",
"expected_prefixes": [
"U",
"IC"
],
"actual_prefix": "CHIP",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_13"
},
{
"type": "source_invalid_component_property_error",
"source_invalid_component_property_error_id": "source_invalid_component_property_error_0",
"source_component_id": "source_component_12",
"property_name": "footprint",
"message": "Invalid footprint prop on transistor \"transistor-1\": \"SOT-223\". Parser details: [\n {\n \"received\": -223,\n \"code\": \"invalid_literal\",\n \"expected\": 6,\n \"path\": [\n \"num_pins\"\n ],\n \"message\": \"Invalid literal value, expected 6\"\n }\n]",
"error_type": "source_invalid_component_property_error"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_0",
"connected_source_port_ids": [
"source_port_0"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-1 > .pin1 to net.N4",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_0",
"message": "<trace#3686(from:.resistor-1 > .pin1 to:net.N4) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_0",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_1",
"connected_source_port_ids": [
"source_port_1"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-1 > .pin2 to net.N5",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_1",
"message": "<trace#3687(from:.resistor-1 > .pin2 to:net.N5) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_1",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_2",
"connected_source_port_ids": [
"source_port_3"
],
"connected_source_net_ids": [
"source_net_2"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-2 > .pin2 to net.N1",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_2",
"message": "<trace#3688(from:.resistor-2 > .pin2 to:net.N1) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_2",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_3",
"connected_source_port_ids": [
"source_port_2"
],
"connected_source_net_ids": [
"source_net_3"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-2 > .pin1 to net.N12",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_3",
"message": "<trace#3689(from:.resistor-2 > .pin1 to:net.N12) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_3",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_4",
"connected_source_port_ids": [
"source_port_5"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-3 > .pin2 to net.N5",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_4",
"message": "<trace#3690(from:.resistor-3 > .pin2 to:net.N5) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_4",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_5",
"connected_source_port_ids": [
"source_port_4"
],
"connected_source_net_ids": [
"source_net_4"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-3 > .pin1 to net.N6",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_5",
"message": "<trace#3691(from:.resistor-3 > .pin1 to:net.N6) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_5",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_6",
"connected_source_port_ids": [
"source_port_6"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-4 > .pin1 to net.N4",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_6",
"message": "<trace#3692(from:.resistor-4 > .pin1 to:net.N4) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_6",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_7",
"connected_source_port_ids": [
"source_port_7"
],
"connected_source_net_ids": [
"source_net_5"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-4 > .pin2 to net.N10",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_7",
"message": "<trace#3693(from:.resistor-4 > .pin2 to:net.N10) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_7",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_8",
"connected_source_port_ids": [
"source_port_8"
],
"connected_source_net_ids": [
"source_net_6"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-5 > .pin1 to net.N2",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_8",
"message": "<trace#3694(from:.resistor-5 > .pin1 to:net.N2) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_8",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_9",
"connected_source_port_ids": [
"source_port_9"
],
"connected_source_net_ids": [
"source_net_4"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-5 > .pin2 to net.N6",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_9",
"message": "<trace#3695(from:.resistor-5 > .pin2 to:net.N6) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_9",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_10",
"connected_source_port_ids": [
"source_port_11"
],
"connected_source_net_ids": [
"source_net_7"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-1 > .pin2 to net.N3",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_10",
"message": "<trace#3696(from:.capacitor-1 > .pin2 to:net.N3) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_10",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_11",
"connected_source_port_ids": [
"source_port_10"
],
"connected_source_net_ids": [
"source_net_5"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-1 > .pin1 to net.N10",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_11",
"message": "<trace#3697(from:.capacitor-1 > .pin1 to:net.N10) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_11",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_12",
"connected_source_port_ids": [
"source_port_13"
],
"connected_source_net_ids": [
"source_net_8"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-2 > .pin2 to net.N11",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_12",
"message": "<trace#3698(from:.capacitor-2 > .pin2 to:net.N11) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_12",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_13",
"connected_source_port_ids": [
"source_port_12"
],
"connected_source_net_ids": [
"source_net_9"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-2 > .pin1 to net.N13",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_13",
"message": "<trace#3699(from:.capacitor-2 > .pin1 to:net.N13) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_13",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_14",
"connected_source_port_ids": [
"source_port_14"
],
"connected_source_net_ids": [
"source_net_10"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-3 > .pin1 to net.N7",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_14",
"message": "<trace#3700(from:.capacitor-3 > .pin1 to:net.N7) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_14",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_15",
"connected_source_port_ids": [
"source_port_15"
],
"connected_source_net_ids": [
"source_net_9"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-3 > .pin2 to net.N13",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_15",
"message": "<trace#3701(from:.capacitor-3 > .pin2 to:net.N13) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_15",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_16",
"connected_source_port_ids": [
"source_port_17"
],
"connected_source_net_ids": [
"source_net_6"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-4 > .pin2 to net.N2",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_16",
"message": "<trace#3702(from:.capacitor-4 > .pin2 to:net.N2) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_16",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_17",
"connected_source_port_ids": [
"source_port_16"
],
"connected_source_net_ids": [
"source_net_10"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-4 > .pin1 to net.N7",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_17",
"message": "<trace#3703(from:.capacitor-4 > .pin1 to:net.N7) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_17",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_18",
"connected_source_port_ids": [
"source_port_19"
],
"connected_source_net_ids": [
"source_net_2"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".inductor-1 > .pin2 to net.N1",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_18",
"message": "<trace#3704(from:.inductor-1 > .pin2 to:net.N1) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_18",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_19",
"connected_source_port_ids": [
"source_port_18"
],
"connected_source_net_ids": [
"source_net_5"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".inductor-1 > .pin1 to net.N10",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_19",
"message": "<trace#3705(from:.inductor-1 > .pin1 to:net.N10) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_19",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_20",
"connected_source_port_ids": [
"source_port_20"
],
"connected_source_net_ids": [
"source_net_6"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".diode-1 > .pin1 to net.N2",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_20",
"message": "<trace#3706(from:.diode-1 > .pin1 to:net.N2) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_20",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_21",
"connected_source_port_ids": [
"source_port_21"
],
"connected_source_net_ids": [
"source_net_11"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".diode-1 > .pin2 to net.N8",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_21",
"message": "<trace#3707(from:.diode-1 > .pin2 to:net.N8) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_21",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_22",
"connected_source_port_ids": [
"source_port_23"
],
"connected_source_net_ids": [
"source_net_4"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".diode-2 > .pin2 to net.N6",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_22",
"message": "<trace#3708(from:.diode-2 > .pin2 to:net.N6) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_22",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_23",
"connected_source_port_ids": [
"source_port_22"
],
"connected_source_net_ids": [
"source_net_11"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".diode-2 > .pin1 to net.N8",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_23",
"message": "<trace#3709(from:.diode-2 > .pin1 to:net.N8) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_23",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_24",
"connected_source_port_ids": [
"source_port_25"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-1 > .pin3 to net.N4",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_24",
"message": "<trace#3710(from:.transistor-1 > .pin3 to:net.N4) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_24",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_25",
"connected_source_port_ids": [
"source_port_26"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-1 > .pin2 to net.N4",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_25",
"message": "<trace#3711(from:.transistor-1 > .pin2 to:net.N4) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_25",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_26",
"connected_source_port_ids": [
"source_port_24"
],
"connected_source_net_ids": [
"source_net_12"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-1 > .pin1 to net.N9",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_26",
"message": "<trace#3712(from:.transistor-1 > .pin1 to:net.N9) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_26",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_27",
"connected_source_port_ids": [
"source_port_30"
],
"connected_source_net_ids": [
"source_net_7"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-1 > .pin4 to net.N3",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_27",
"message": "<trace#3713(from:.chip-1 > .pin4 to:net.N3) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_27",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_28",
"connected_source_port_ids": [
"source_port_32"
],
"connected_source_net_ids": [
"source_net_7"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-1 > .pin6 to net.N3",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_28",
"message": "<trace#3714(from:.chip-1 > .pin6 to:net.N3) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_28",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_29",
"connected_source_port_ids": [
"source_port_33"
],
"connected_source_net_ids": [
"source_net_10"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-1 > .pin7 to net.N7",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_29",
"message": "<trace#3715(from:.chip-1 > .pin7 to:net.N7) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_29",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_30",
"connected_source_port_ids": [
"source_port_31"
],
"connected_source_net_ids": [
"source_net_12"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-1 > .pin5 to net.N9",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_30",
"message": "<trace#3716(from:.chip-1 > .pin5 to:net.N9) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_30",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_31",
"connected_source_port_ids": [
"source_port_29"
],
"connected_source_net_ids": [
"source_net_12"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-1 > .pin3 to net.N9",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_31",
"message": "<trace#3717(from:.chip-1 > .pin3 to:net.N9) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_31",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_32",
"connected_source_port_ids": [
"source_port_28"
],
"connected_source_net_ids": [
"source_net_5"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-1 > .pin2 to net.N10",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_32",
"message": "<trace#3718(from:.chip-1 > .pin2 to:net.N10) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_32",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_33",
"connected_source_port_ids": [
"source_port_34"
],
"connected_source_net_ids": [
"source_net_8"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-1 > .pin8 to net.N11",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_33",
"message": "<trace#3719(from:.chip-1 > .pin8 to:net.N11) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_33",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_34",
"connected_source_port_ids": [
"source_port_27"
],
"connected_source_net_ids": [
"source_net_3"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-1 > .pin1 to net.N12",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_34",
"message": "<trace#3720(from:.chip-1 > .pin1 to:net.N12) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_34",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_35",
"connected_source_port_ids": [
"source_port_37"
],
"connected_source_net_ids": [
"source_net_10"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-1 > .pin3 to net.N7",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_35",
"message": "<trace#3721(from:.pinhead-1 > .pin3 to:net.N7) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_35",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_36",
"connected_source_port_ids": [
"source_port_36"
],
"connected_source_net_ids": [
"source_net_11"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-1 > .pin2 to net.N8",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_36",
"message": "<trace#3722(from:.pinhead-1 > .pin2 to:net.N8) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_36",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_37",
"connected_source_port_ids": [
"source_port_40"
],
"connected_source_net_ids": [
"source_net_8"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-1 > .pin6 to net.N11",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_37",
"message": "<trace#3723(from:.pinhead-1 > .pin6 to:net.N11) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_37",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_38",
"connected_source_port_ids": [
"source_port_35"
],
"connected_source_net_ids": [
"source_net_8"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-1 > .pin1 to net.N11",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_38",
"message": "<trace#3724(from:.pinhead-1 > .pin1 to:net.N11) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_38",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
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"source_port_39"
],
"connected_source_net_ids": [
"source_net_9"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-1 > .pin5 to net.N13",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
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"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_39",
"message": "<trace#3725(from:.pinhead-1 > .pin5 to:net.N13) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_39",
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"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
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"source_port_38"
],
"connected_source_net_ids": [
"source_net_9"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-1 > .pin4 to net.N13",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_40",
"message": "<trace#3726(from:.pinhead-1 > .pin4 to:net.N13) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_40",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "schematic_component",
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},
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"height": 0.65
},
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"symbol_name": "boxresistor_right",
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},
{
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},
"size": {
"width": 0.6,
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},
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"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
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},
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},
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"schematic_group_id": "schematic_group_0"
},
{
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},
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"height": 0.65
},
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},
{
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},
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},
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},
{
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},
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},
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"symbol_name": "capacitor_right",
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},
{
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},
"size": {
"width": 0.6,
"height": 0.65
},
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},
{
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},
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},
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},
{
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"y": -21.42
},
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},
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{
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},
"size": {
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"symbol_name": "inductor_right",
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},
{
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},
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"height": 0.54
},
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"symbol_name": "diode_right",
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},
{
"type": "schematic_component",
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},
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},
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},
{
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},
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},
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"symbol_name": "pnp_bipolar_transistor_right",
"schematic_group_id": "schematic_group_0"
},
{
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"center": {
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"y": 0
},
"rotation": 0,
"size": {
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},
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"port_labels": {},
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},
{
"type": "schematic_text",
"schematic_text_id": "schematic_text_0",
"text": "GENERIC",
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"anchor": "left",
"rotation": 0,
"position": {
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"y": -0.63
},
"color": "#006464",
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},
{
"type": "schematic_text",
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"text": "chip-1",
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"y": 0.63
},
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{
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},
"rotation": 0,
"size": {
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"height": 1.4
},
"port_arrangement": {
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"direction": "top-to-bottom",
"pins": [
"pin1",
"pin2",
"pin3",
"pin4",
"pin5",
"pin6"
]
}
},
"pin_spacing": 0.2,
"port_labels": {},
"source_component_id": "source_component_14",
"schematic_group_id": "schematic_group_0"
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{
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},
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{
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},
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},
{
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"subcircuit_id": "subcircuit_source_group_0",
"name": "unnamed_board1",
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},
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"height": 0,
"schematic_component_ids": [],
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},
{
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"schematic_port_id": "schematic_port_0",
"schematic_component_id": "schematic_component_0",
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},
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"facing_direction": "left",
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"pin_number": 1,
"display_pin_label": "anode",
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},
{
"type": "schematic_port",
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"schematic_component_id": "schematic_component_0",
"center": {
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},
"source_port_id": "source_port_1",
"facing_direction": "right",
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"pin_number": 2,
"display_pin_label": "cathode",
"is_connected": true
},
{
"type": "schematic_port",
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"schematic_component_id": "schematic_component_1",
"center": {
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},
"source_port_id": "source_port_2",
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"pin_number": 1,
"display_pin_label": "anode",
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},
{
"type": "schematic_port",
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"schematic_component_id": "schematic_component_1",
"center": {
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},
"source_port_id": "source_port_3",
"facing_direction": "right",
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"pin_number": 2,
"display_pin_label": "cathode",
"is_connected": false
},
{
"type": "schematic_port",
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"schematic_component_id": "schematic_component_2",
"center": {
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},
"source_port_id": "source_port_4",
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"pin_number": 1,
"display_pin_label": "anode",
"is_connected": true
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_5",
"schematic_component_id": "schematic_component_2",
"center": {
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"y": -9.579999999999998
},
"source_port_id": "source_port_5",
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"pin_number": 2,
"display_pin_label": "cathode",
"is_connected": true
},
{
"type": "schematic_port",
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"schematic_component_id": "schematic_component_3",
"center": {
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},
"source_port_id": "source_port_6",
"facing_direction": "left",
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"pin_number": 1,
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"is_connected": true
},
{
"type": "schematic_port",
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},
{
"type": "schematic_port",
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},
"source_port_id": "source_port_8",
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"pin_number": 1,
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},
{
"type": "schematic_port",
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"source_port_id": "source_port_9",
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"pin_number": 2,
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},
{
"type": "schematic_port",
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"schematic_component_id": "schematic_component_5",
"center": {
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},
"source_port_id": "source_port_10",
"facing_direction": "left",
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"pin_number": 1,
"display_pin_label": "pos",
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},
{
"type": "schematic_port",
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"center": {
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},
"source_port_id": "source_port_11",
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"display_pin_label": "neg",
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},
{
"type": "schematic_port",
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"schematic_component_id": "schematic_component_6",
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},
"source_port_id": "source_port_12",
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},
{
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},
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},
{
"type": "schematic_port",
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"source_port_id": "source_port_14",
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},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_15",
"schematic_component_id": "schematic_component_7",
"center": {
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},
"source_port_id": "source_port_15",
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"pin_number": 2,
"display_pin_label": "neg",
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},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_16",
"schematic_component_id": "schematic_component_8",
"center": {
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},
"source_port_id": "source_port_16",
"facing_direction": "left",
"distance_from_component_edge": 0.4,
"pin_number": 1,
"display_pin_label": "pos",
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},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_17",
"schematic_component_id": "schematic_component_8",
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"source_port_id": "source_port_17",
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},
{
"type": "schematic_port",
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"schematic_component_id": "schematic_component_9",
"center": {
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},
"source_port_id": "source_port_18",
"facing_direction": "left",
"distance_from_component_edge": 0.4,
"pin_number": 1,
"display_pin_label": "anode",
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},
{
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},
{
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},
{
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},
{
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},
{
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"source_port_id": "source_port_23",
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},
{
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"source_port_id": "source_port_24",
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},
{
"type": "schematic_port",
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"center": {
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},
"source_port_id": "source_port_25",
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"pin_number": 3,
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},
{
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"rotation": {
"x": 0,
"y": 0,
"z": 15
},
"pcb_component_id": "pcb_component_5",
"source_component_id": "source_component_5",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "cap0402"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_6",
"position": {
"x": -15,
"y": -1,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 0
},
"pcb_component_id": "pcb_component_6",
"source_component_id": "source_component_6",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "cap0805"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_7",
"position": {
"x": 3,
"y": 1,
"z": -0.7
},
"rotation": {
"x": 0,
"y": 180,
"z": 0
},
"pcb_component_id": "pcb_component_7",
"source_component_id": "source_component_7",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "cap0402"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_8",
"position": {
"x": 0,
"y": -10,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 0
},
"pcb_component_id": "pcb_component_8",
"source_component_id": "source_component_8",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "cap0402"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_9",
"position": {
"x": -5,
"y": 5,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 0
},
"pcb_component_id": "pcb_component_9",
"source_component_id": "source_component_9",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "0402"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_10",
"position": {
"x": -7.000000000000001,
"y": -2,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 0
},
"pcb_component_id": "pcb_component_10",
"source_component_id": "source_component_10",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "sod323"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_11",
"position": {
"x": 5,
"y": 5,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 0
},
"pcb_component_id": "pcb_component_11",
"source_component_id": "source_component_11",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "sod123"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_12",
"position": {
"x": -7,
"y": -15,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 0
},
"pcb_component_id": "pcb_component_12",
"source_component_id": "source_component_12",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "SOT-223"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_13",
"position": {
"x": 10,
"y": 12,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 0
},
"pcb_component_id": "pcb_component_13",
"source_component_id": "source_component_13",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "dip8"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_14",
"position": {
"x": 7,
"y": -1,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 15
},
"pcb_component_id": "pcb_component_14",
"source_component_id": "source_component_14",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "pinrow6"
},
{
"type": "source_component_pins_underspecified_warning",
"source_component_pins_underspecified_warning_id": "source_component_pins_underspecified_warning_0",
"warning_type": "source_component_pins_underspecified_warning",
"message": "All pins on chip-1 are underspecified (no pinAttributes set)",
"source_component_id": "source_component_13",
"source_port_ids": [
"source_port_27",
"source_port_28",
"source_port_29",
"source_port_30",
"source_port_31",
"source_port_32",
"source_port_33",
"source_port_34"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_power_pin_defined_warning",
"source_no_power_pin_defined_warning_id": "source_no_power_pin_defined_warning_0",
"warning_type": "source_no_power_pin_defined_warning",
"message": "chip-1 has no pin with requires_power=true",
"source_component_id": "source_component_13",
"source_port_ids": [
"source_port_27",
"source_port_28",
"source_port_29",
"source_port_30",
"source_port_31",
"source_port_32",
"source_port_33",
"source_port_34"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_ground_pin_defined_warning",
"source_no_ground_pin_defined_warning_id": "source_no_ground_pin_defined_warning_0",
"warning_type": "source_no_ground_pin_defined_warning",
"message": "chip-1 has no pin with requires_ground=true",
"source_component_id": "source_component_13",
"source_port_ids": [
"source_port_27",
"source_port_28",
"source_port_29",
"source_port_30",
"source_port_31",
"source_port_32",
"source_port_33",
"source_port_34"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_G5tXAvHiKb",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<capacitor#3452 name=\".capacitor-4\" /> footprint \"0402\" does not match supplier footprint jlcpcb:C1525 (copper IoU 0.7249).",
"source_component_id": "source_component_8",
"pcb_component_id": "pcb_component_8",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C1525",
"footprint_copper_intersection_over_union": 0.7249
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_3WwaZJckhd",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<capacitor#3416 name=\".capacitor-1\" /> footprint \"0402\" does not match supplier footprint jlcpcb:C1525 (copper IoU 0.5249).",
"source_component_id": "source_component_5",
"pcb_component_id": "pcb_component_5",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C1525",
"footprint_copper_intersection_over_union": 0.5249
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_HBYwaKgTf6",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<resistor#3351 name=\".resistor-1\" /> footprint \"0402\" does not match supplier footprint jlcpcb:C11702 (copper IoU 0.7741).",
"source_component_id": "source_component_0",
"pcb_component_id": "pcb_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C11702",
"footprint_copper_intersection_over_union": 0.7741
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_OuUq3LTHAC",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<resistor#3403 name=\".resistor-5\" /> footprint \"0402\" does not match supplier footprint jlcpcb:C11702 (copper IoU 0.7741).",
"source_component_id": "source_component_4",
"pcb_component_id": "pcb_component_4",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C11702",
"footprint_copper_intersection_over_union": 0.7741
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_FfGaVsvCHK",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<capacitor#3440 name=\".capacitor-3\" /> footprint \"0402\" does not match supplier footprint jlcpcb:C1525 (copper IoU 0.7249).",
"source_component_id": "source_component_7",
"pcb_component_id": "pcb_component_7",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C1525",
"footprint_copper_intersection_over_union": 0.7249
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_hK2O23m0gK",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<pinheader#3547 name=\".pinhead-1\" /> footprint \"pinrow6\" does not match supplier footprint jlcpcb:C492420 (copper IoU 0.4163).",
"source_component_id": "source_component_14",
"pcb_component_id": "pcb_component_14",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C492420",
"footprint_copper_intersection_over_union": 0.4163
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_e9jKstrbBW",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<resistor#3377 name=\".resistor-3\" /> footprint \"0603\" does not match supplier footprint jlcpcb:C21190 (copper IoU 0.4221).",
"source_component_id": "source_component_2",
"pcb_component_id": "pcb_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C21190",
"footprint_copper_intersection_over_union": 0.4221
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_dGm3CEQx3X",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<resistor#3364 name=\".resistor-2\" /> footprint \"0402\" does not match supplier footprint jlcpcb:C11702 (copper IoU 0.7741).",
"source_component_id": "source_component_1",
"pcb_component_id": "pcb_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C11702",
"footprint_copper_intersection_over_union": 0.7741
},
{
"type": "source_project_metadata",
"source_filesystem_md5_hash": "3fbdf5adbcca5810255d1c815ce964f6"
}
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