tscircuit/autorouting-dataset-01
This code manages the hardware and electronic components for circuit design and PCB layout, defining components like resistors, capacitors, transistors, connectors, and footprints, and providing tools for component placement, PCB topology, and electrical connections.
- Version
- 1.0.102
- License
- unset
- Stars
- 4
dist/lib/circuit/circuit109/circuit.json
PCB
Schematic
[
{
"type": "source_group",
"source_group_id": "source_group_0",
"is_subcircuit": true,
"was_automatically_named": true,
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_0",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_port",
"source_port_id": "source_port_1",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_component",
"source_component_id": "source_component_0",
"ftype": "simple_resistor",
"name": "resistor-1",
"supplier_part_numbers": {
"jlcpcb": [
"C21190",
"C2907002",
"C2907113"
]
},
"resistance": 1000,
"display_resistance": "1kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_2",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_port",
"source_port_id": "source_port_3",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_component",
"source_component_id": "source_component_1",
"ftype": "simple_resistor",
"name": "resistor-2",
"supplier_part_numbers": {
"jlcpcb": [
"C11702",
"C25543",
"C2906864"
]
},
"resistance": 1000,
"display_resistance": "1kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_4",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_port",
"source_port_id": "source_port_5",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_component",
"source_component_id": "source_component_2",
"ftype": "simple_resistor",
"name": "resistor-3",
"supplier_part_numbers": {
"jlcpcb": [
"C21190",
"C2907002",
"C2907113"
]
},
"resistance": 1000,
"display_resistance": "1kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_6",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_3",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_port",
"source_port_id": "source_port_7",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_3",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_component",
"source_component_id": "source_component_3",
"ftype": "simple_resistor",
"name": "resistor-4",
"supplier_part_numbers": {
"jlcpcb": [
"C17513",
"C2907295",
"C25623"
]
},
"resistance": 1000,
"display_resistance": "1kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_8",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_4",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_port",
"source_port_id": "source_port_9",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_4",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_component",
"source_component_id": "source_component_4",
"ftype": "simple_resistor",
"name": "resistor-5",
"supplier_part_numbers": {
"jlcpcb": [
"C21190",
"C2907002",
"C2907113"
]
},
"resistance": 1000,
"display_resistance": "1kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_10",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_5",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_port",
"source_port_id": "source_port_11",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_5",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_component",
"source_component_id": "source_component_5",
"ftype": "simple_resistor",
"name": "resistor-6",
"supplier_part_numbers": {
"jlcpcb": [
"C21190",
"C2907002",
"C2907113"
]
},
"resistance": 1000,
"display_resistance": "1kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_12",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_6",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_port",
"source_port_id": "source_port_13",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_6",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_component",
"source_component_id": "source_component_6",
"ftype": "simple_resistor",
"name": "resistor-7",
"supplier_part_numbers": {
"jlcpcb": [
"C21190",
"C2907002",
"C2907113"
]
},
"resistance": 1000,
"display_resistance": "1kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_14",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_7",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_port",
"source_port_id": "source_port_15",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_7",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net13"
},
{
"type": "source_component",
"source_component_id": "source_component_7",
"ftype": "simple_resistor",
"name": "resistor-8",
"supplier_part_numbers": {
"jlcpcb": [
"C21190",
"C2907002",
"C2907113"
]
},
"resistance": 1000,
"display_resistance": "1kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_16",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"1",
"left"
],
"source_component_id": "source_component_8",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net14"
},
{
"type": "source_port",
"source_port_id": "source_port_17",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"2",
"right"
],
"source_component_id": "source_component_8",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_component",
"source_component_id": "source_component_8",
"ftype": "simple_capacitor",
"name": "capacitor-1",
"supplier_part_numbers": {
"jlcpcb": [
"C1525",
"C307331",
"C60474"
]
},
"capacitance": 1e-7,
"display_capacitance": "0.1uF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_18",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"1",
"left"
],
"source_component_id": "source_component_9",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net16"
},
{
"type": "source_port",
"source_port_id": "source_port_19",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"2",
"right"
],
"source_component_id": "source_component_9",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"
},
{
"type": "source_component",
"source_component_id": "source_component_9",
"ftype": "simple_capacitor",
"name": "capacitor-2",
"supplier_part_numbers": {
"jlcpcb": [
"C14663",
"C1591",
"C282519"
]
},
"capacitance": 1e-7,
"display_capacitance": "0.1uF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_20",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"1",
"left"
],
"source_component_id": "source_component_10",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_port",
"source_port_id": "source_port_21",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"2",
"right"
],
"source_component_id": "source_component_10",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_component",
"source_component_id": "source_component_10",
"ftype": "simple_capacitor",
"name": "capacitor-3",
"supplier_part_numbers": {
"jlcpcb": [
"C14663",
"C1591",
"C282519"
]
},
"capacitance": 1e-7,
"display_capacitance": "0.1uF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_22",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"1",
"left"
],
"source_component_id": "source_component_11",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net17"
},
{
"type": "source_port",
"source_port_id": "source_port_23",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"2",
"right"
],
"source_component_id": "source_component_11",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_component",
"source_component_id": "source_component_11",
"ftype": "simple_capacitor",
"name": "capacitor-4",
"supplier_part_numbers": {
"jlcpcb": [
"C14663",
"C1591",
"C282519"
]
},
"capacitance": 1e-7,
"display_capacitance": "0.1uF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_24",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_12",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_port",
"source_port_id": "source_port_25",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_12",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_component",
"source_component_id": "source_component_12",
"name": "inductor-1",
"ftype": "simple_inductor",
"inductance": "10uH",
"display_inductance": "10µH",
"supplier_part_numbers": {
"jlcpcb": []
},
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_26",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_13",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_port",
"source_port_id": "source_port_27",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_13",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"
},
{
"type": "source_component",
"source_component_id": "source_component_13",
"name": "inductor-2",
"ftype": "simple_inductor",
"inductance": "10uH",
"display_inductance": "10µH",
"supplier_part_numbers": {
"jlcpcb": []
},
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_28",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"left",
"1"
],
"source_component_id": "source_component_14",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_port",
"source_port_id": "source_port_29",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"right",
"2"
],
"source_component_id": "source_component_14",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net14"
},
{
"type": "source_component",
"source_component_id": "source_component_14",
"ftype": "simple_diode",
"name": "diode-1",
"supplier_part_numbers": {
"jlcpcb": []
},
"are_pins_interchangeable": false,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_30",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"pos",
"anode",
"left",
"1"
],
"source_component_id": "source_component_15",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net16"
},
{
"type": "source_port",
"source_port_id": "source_port_31",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"neg",
"cathode",
"right",
"2"
],
"source_component_id": "source_component_15",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_component",
"source_component_id": "source_component_15",
"ftype": "simple_diode",
"name": "diode-2",
"supplier_part_numbers": {
"jlcpcb": []
},
"are_pins_interchangeable": false,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_32",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"collector",
"c",
"1"
],
"source_component_id": "source_component_16",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net20"
},
{
"type": "source_port",
"source_port_id": "source_port_33",
"name": "pin3",
"pin_number": 3,
"port_hints": [
"pin3",
"emitter",
"e",
"3"
],
"source_component_id": "source_component_16",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net19"
},
{
"type": "source_port",
"source_port_id": "source_port_34",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"base",
"b",
"2"
],
"source_component_id": "source_component_16",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_component",
"source_component_id": "source_component_16",
"ftype": "simple_transistor",
"name": "transistor-1",
"supplier_part_numbers": {
"jlcpcb": []
},
"transistor_type": "bjt",
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_35",
"name": "pin1",
"pin_number": 1,
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{
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{
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"pin4",
"4"
],
"source_component_id": "source_component_24",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net24"
},
{
"type": "source_component",
"source_component_id": "source_component_24",
"ftype": "simple_pin_header",
"name": "pinhead-2",
"supplier_part_numbers": {
"jlcpcb": [
"C2691448",
"C7501273",
"C509261"
]
},
"pin_count": 4,
"gender": "male",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_net",
"source_net_id": "source_net_0",
"name": "N7",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_net",
"source_net_id": "source_net_1",
"name": "N14",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_net",
"source_net_id": "source_net_2",
"name": "N4",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_net",
"source_net_id": "source_net_3",
"name": "N11",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_net",
"source_net_id": "source_net_4",
"name": "N12",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_net",
"source_net_id": "source_net_5",
"name": "N26",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_net",
"source_net_id": "source_net_6",
"name": "N13",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_net",
"source_net_id": "source_net_7",
"name": "N5",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_net",
"source_net_id": "source_net_8",
"name": "N20",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_net",
"source_net_id": "source_net_9",
"name": "N3",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_net",
"source_net_id": "source_net_10",
"name": "N23",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_net",
"source_net_id": "source_net_11",
"name": "N9",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_net",
"source_net_id": "source_net_12",
"name": "N15",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_net",
"source_net_id": "source_net_13",
"name": "N17",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net13"
},
{
"type": "source_net",
"source_net_id": "source_net_14",
"name": "N19",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net14"
},
{
"type": "source_net",
"source_net_id": "source_net_15",
"name": "N8",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"
},
{
"type": "source_net",
"source_net_id": "source_net_16",
"name": "N18",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net16"
},
{
"type": "source_net",
"source_net_id": "source_net_17",
"name": "N25",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net17"
},
{
"type": "source_net",
"source_net_id": "source_net_18",
"name": "N22",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"
},
{
"type": "source_net",
"source_net_id": "source_net_19",
"name": "N1",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net19"
},
{
"type": "source_net",
"source_net_id": "source_net_20",
"name": "N24",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net20"
},
{
"type": "source_net",
"source_net_id": "source_net_21",
"name": "N2",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net21"
},
{
"type": "source_net",
"source_net_id": "source_net_22",
"name": "N21",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net22"
},
{
"type": "source_net",
"source_net_id": "source_net_23",
"name": "N6",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net23"
},
{
"type": "source_net",
"source_net_id": "source_net_24",
"name": "N10",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net24"
},
{
"type": "source_net",
"source_net_id": "source_net_25",
"name": "N16",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net25"
},
{
"type": "source_board",
"source_board_id": "source_board_0",
"source_group_id": "source_group_0"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component resistor-1 has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_0",
"refdes": "resistor-1",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RESISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_0"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component resistor-2 has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_1",
"refdes": "resistor-2",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RESISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_1"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component resistor-3 has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_2",
"refdes": "resistor-3",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RESISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_2"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component resistor-4 has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_3",
"refdes": "resistor-4",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RESISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_3"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component resistor-5 has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_4",
"refdes": "resistor-5",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RESISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_4"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component resistor-6 has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_5",
"refdes": "resistor-6",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RESISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_5"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component resistor-7 has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_6",
"refdes": "resistor-7",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RESISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_6"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component resistor-8 has ftype=\"simple_resistor\" but reference designator should start with R",
"source_component_id": "source_component_7",
"refdes": "resistor-8",
"source_component_ftype": "simple_resistor",
"expected_prefixes": [
"R"
],
"actual_prefix": "RESISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_7"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component capacitor-1 has ftype=\"simple_capacitor\" but reference designator should start with C",
"source_component_id": "source_component_8",
"refdes": "capacitor-1",
"source_component_ftype": "simple_capacitor",
"expected_prefixes": [
"C"
],
"actual_prefix": "CAPACITOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_8"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component capacitor-2 has ftype=\"simple_capacitor\" but reference designator should start with C",
"source_component_id": "source_component_9",
"refdes": "capacitor-2",
"source_component_ftype": "simple_capacitor",
"expected_prefixes": [
"C"
],
"actual_prefix": "CAPACITOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_9"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component capacitor-3 has ftype=\"simple_capacitor\" but reference designator should start with C",
"source_component_id": "source_component_10",
"refdes": "capacitor-3",
"source_component_ftype": "simple_capacitor",
"expected_prefixes": [
"C"
],
"actual_prefix": "CAPACITOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_10"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component capacitor-4 has ftype=\"simple_capacitor\" but reference designator should start with C",
"source_component_id": "source_component_11",
"refdes": "capacitor-4",
"source_component_ftype": "simple_capacitor",
"expected_prefixes": [
"C"
],
"actual_prefix": "CAPACITOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_11"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component inductor-1 has ftype=\"simple_inductor\" but reference designator should start with one of L, FB",
"source_component_id": "source_component_12",
"refdes": "inductor-1",
"source_component_ftype": "simple_inductor",
"expected_prefixes": [
"L",
"FB"
],
"actual_prefix": "INDUCTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_12"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component inductor-2 has ftype=\"simple_inductor\" but reference designator should start with one of L, FB",
"source_component_id": "source_component_13",
"refdes": "inductor-2",
"source_component_ftype": "simple_inductor",
"expected_prefixes": [
"L",
"FB"
],
"actual_prefix": "INDUCTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_13"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component diode-1 has ftype=\"simple_diode\" but reference designator should start with D",
"source_component_id": "source_component_14",
"refdes": "diode-1",
"source_component_ftype": "simple_diode",
"expected_prefixes": [
"D"
],
"actual_prefix": "DIODE",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_14"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component diode-2 has ftype=\"simple_diode\" but reference designator should start with D",
"source_component_id": "source_component_15",
"refdes": "diode-2",
"source_component_ftype": "simple_diode",
"expected_prefixes": [
"D"
],
"actual_prefix": "DIODE",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_15"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component transistor-1 has ftype=\"simple_transistor\" but reference designator should start with Q",
"source_component_id": "source_component_16",
"refdes": "transistor-1",
"source_component_ftype": "simple_transistor",
"expected_prefixes": [
"Q"
],
"actual_prefix": "TRANSISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_16"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "Component transistor-2 has ftype=\"simple_transistor\" but reference designator should start with Q",
"source_component_id": "source_component_17",
"refdes": "transistor-2",
"source_component_ftype": "simple_transistor",
"expected_prefixes": [
"Q"
],
"actual_prefix": "TRANSISTOR",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_17"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "The \"C\" prefix is being used with a <chip />, try using it with a <capacitor />",
"source_component_id": "source_component_18",
"refdes": "chip-1",
"source_component_ftype": "simple_chip",
"expected_prefixes": [
"U",
"IC"
],
"actual_prefix": "CHIP",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_18"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "The \"C\" prefix is being used with a <chip />, try using it with a <capacitor />",
"source_component_id": "source_component_19",
"refdes": "chip-2",
"source_component_ftype": "simple_chip",
"expected_prefixes": [
"U",
"IC"
],
"actual_prefix": "CHIP",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_19"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "The \"C\" prefix is being used with a <chip />, try using it with a <capacitor />",
"source_component_id": "source_component_20",
"refdes": "chip-3",
"source_component_ftype": "simple_chip",
"expected_prefixes": [
"U",
"IC"
],
"actual_prefix": "CHIP",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_20"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "The \"C\" prefix is being used with a <chip />, try using it with a <capacitor />",
"source_component_id": "source_component_21",
"refdes": "chip-4",
"source_component_ftype": "simple_chip",
"expected_prefixes": [
"U",
"IC"
],
"actual_prefix": "CHIP",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_21"
},
{
"type": "source_refdes_convention_warning",
"warning_type": "source_refdes_convention_warning",
"message": "The \"C\" prefix is being used with a <chip />, try using it with a <capacitor />",
"source_component_id": "source_component_22",
"refdes": "chip-5",
"source_component_ftype": "simple_chip",
"expected_prefixes": [
"U",
"IC"
],
"actual_prefix": "CHIP",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_22"
},
{
"type": "source_invalid_component_property_error",
"source_invalid_component_property_error_id": "source_invalid_component_property_error_0",
"source_component_id": "source_component_16",
"property_name": "footprint",
"message": "Invalid footprint prop on transistor \"transistor-1\": \"SOT-223\". Parser details: [\n {\n \"received\": -223,\n \"code\": \"invalid_literal\",\n \"expected\": 6,\n \"path\": [\n \"num_pins\"\n ],\n \"message\": \"Invalid literal value, expected 6\"\n }\n]",
"error_type": "source_invalid_component_property_error"
},
{
"type": "source_invalid_component_property_error",
"source_invalid_component_property_error_id": "source_invalid_component_property_error_1",
"source_component_id": "source_component_17",
"property_name": "footprint",
"message": "Invalid footprint prop on transistor \"transistor-2\": \"SOT-223\". Parser details: [\n {\n \"received\": -223,\n \"code\": \"invalid_literal\",\n \"expected\": 6,\n \"path\": [\n \"num_pins\"\n ],\n \"message\": \"Invalid literal value, expected 6\"\n }\n]",
"error_type": "source_invalid_component_property_error"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_0",
"connected_source_port_ids": [
"source_port_1"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-1 > .pin2 to net.N7",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_0",
"message": "<trace#4220(from:.resistor-1 > .pin2 to:net.N7) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_0",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_1",
"connected_source_port_ids": [
"source_port_0"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-1 > .pin1 to net.N14",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_1",
"message": "<trace#4221(from:.resistor-1 > .pin1 to:net.N14) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_1",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_2",
"connected_source_port_ids": [
"source_port_2"
],
"connected_source_net_ids": [
"source_net_2"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-2 > .pin1 to net.N4",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_2",
"message": "<trace#4222(from:.resistor-2 > .pin1 to:net.N4) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_2",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_3",
"connected_source_port_ids": [
"source_port_3"
],
"connected_source_net_ids": [
"source_net_3"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-2 > .pin2 to net.N11",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_3",
"message": "<trace#4223(from:.resistor-2 > .pin2 to:net.N11) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_3",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_4",
"connected_source_port_ids": [
"source_port_5"
],
"connected_source_net_ids": [
"source_net_4"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-3 > .pin2 to net.N12",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_4",
"message": "<trace#4224(from:.resistor-3 > .pin2 to:net.N12) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_4",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_5",
"connected_source_port_ids": [
"source_port_4"
],
"connected_source_net_ids": [
"source_net_5"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-3 > .pin1 to net.N26",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_5",
"message": "<trace#4225(from:.resistor-3 > .pin1 to:net.N26) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_5",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_6",
"connected_source_port_ids": [
"source_port_7"
],
"connected_source_net_ids": [
"source_net_4"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-4 > .pin2 to net.N12",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_6",
"message": "<trace#4226(from:.resistor-4 > .pin2 to:net.N12) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_6",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_7",
"connected_source_port_ids": [
"source_port_6"
],
"connected_source_net_ids": [
"source_net_6"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-4 > .pin1 to net.N13",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_7",
"message": "<trace#4227(from:.resistor-4 > .pin1 to:net.N13) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_7",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_8",
"connected_source_port_ids": [
"source_port_9"
],
"connected_source_net_ids": [
"source_net_7"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-5 > .pin2 to net.N5",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_8",
"message": "<trace#4228(from:.resistor-5 > .pin2 to:net.N5) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_8",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_9",
"connected_source_port_ids": [
"source_port_8"
],
"connected_source_net_ids": [
"source_net_8"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-5 > .pin1 to net.N20",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_9",
"message": "<trace#4229(from:.resistor-5 > .pin1 to:net.N20) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_9",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_10",
"connected_source_port_ids": [
"source_port_11"
],
"connected_source_net_ids": [
"source_net_9"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-6 > .pin2 to net.N3",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_10",
"message": "<trace#4230(from:.resistor-6 > .pin2 to:net.N3) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_10",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_11",
"connected_source_port_ids": [
"source_port_10"
],
"connected_source_net_ids": [
"source_net_10"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-6 > .pin1 to net.N23",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_11",
"message": "<trace#4231(from:.resistor-6 > .pin1 to:net.N23) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_11",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_12",
"connected_source_port_ids": [
"source_port_12"
],
"connected_source_net_ids": [
"source_net_11"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-7 > .pin1 to net.N9",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_12",
"message": "<trace#4232(from:.resistor-7 > .pin1 to:net.N9) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_12",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_13",
"connected_source_port_ids": [
"source_port_13"
],
"connected_source_net_ids": [
"source_net_12"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-7 > .pin2 to net.N15",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_13",
"message": "<trace#4233(from:.resistor-7 > .pin2 to:net.N15) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_13",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_14",
"connected_source_port_ids": [
"source_port_14"
],
"connected_source_net_ids": [
"source_net_3"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-8 > .pin1 to net.N11",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_14",
"message": "<trace#4234(from:.resistor-8 > .pin1 to:net.N11) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_14",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_15",
"connected_source_port_ids": [
"source_port_15"
],
"connected_source_net_ids": [
"source_net_13"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".resistor-8 > .pin2 to net.N17",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net13"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_15",
"message": "<trace#4235(from:.resistor-8 > .pin2 to:net.N17) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_15",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_16",
"connected_source_port_ids": [
"source_port_16"
],
"connected_source_net_ids": [
"source_net_14"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-1 > .pin1 to net.N19",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net14"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_16",
"message": "<trace#4236(from:.capacitor-1 > .pin1 to:net.N19) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_16",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_17",
"connected_source_port_ids": [
"source_port_17"
],
"connected_source_net_ids": [
"source_net_10"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-1 > .pin2 to net.N23",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_17",
"message": "<trace#4237(from:.capacitor-1 > .pin2 to:net.N23) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_17",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_18",
"connected_source_port_ids": [
"source_port_19"
],
"connected_source_net_ids": [
"source_net_15"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-2 > .pin2 to net.N8",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_18",
"message": "<trace#4238(from:.capacitor-2 > .pin2 to:net.N8) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_18",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_19",
"connected_source_port_ids": [
"source_port_18"
],
"connected_source_net_ids": [
"source_net_16"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-2 > .pin1 to net.N18",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net16"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_19",
"message": "<trace#4239(from:.capacitor-2 > .pin1 to:net.N18) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_19",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_20",
"connected_source_port_ids": [
"source_port_21"
],
"connected_source_net_ids": [
"source_net_12"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-3 > .pin2 to net.N15",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_20",
"message": "<trace#4240(from:.capacitor-3 > .pin2 to:net.N15) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_20",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_21",
"connected_source_port_ids": [
"source_port_20"
],
"connected_source_net_ids": [
"source_net_5"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-3 > .pin1 to net.N26",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_21",
"message": "<trace#4241(from:.capacitor-3 > .pin1 to:net.N26) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_21",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_22",
"connected_source_port_ids": [
"source_port_23"
],
"connected_source_net_ids": [
"source_net_11"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-4 > .pin2 to net.N9",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_22",
"message": "<trace#4242(from:.capacitor-4 > .pin2 to:net.N9) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_22",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_23",
"connected_source_port_ids": [
"source_port_22"
],
"connected_source_net_ids": [
"source_net_17"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".capacitor-4 > .pin1 to net.N25",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net17"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_23",
"message": "<trace#4243(from:.capacitor-4 > .pin1 to:net.N25) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_23",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_24",
"connected_source_port_ids": [
"source_port_24"
],
"connected_source_net_ids": [
"source_net_7"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".inductor-1 > .pin1 to net.N5",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_24",
"message": "<trace#4244(from:.inductor-1 > .pin1 to:net.N5) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_24",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_25",
"connected_source_port_ids": [
"source_port_25"
],
"connected_source_net_ids": [
"source_net_6"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".inductor-1 > .pin2 to net.N13",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_25",
"message": "<trace#4245(from:.inductor-1 > .pin2 to:net.N13) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_25",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_26",
"connected_source_port_ids": [
"source_port_26"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".inductor-2 > .pin1 to net.N14",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_26",
"message": "<trace#4246(from:.inductor-2 > .pin1 to:net.N14) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_26",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_27",
"connected_source_port_ids": [
"source_port_27"
],
"connected_source_net_ids": [
"source_net_18"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".inductor-2 > .pin2 to net.N22",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_27",
"message": "<trace#4247(from:.inductor-2 > .pin2 to:net.N22) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_27",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_28",
"connected_source_port_ids": [
"source_port_28"
],
"connected_source_net_ids": [
"source_net_6"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".diode-1 > .pin1 to net.N13",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_28",
"message": "<trace#4248(from:.diode-1 > .pin1 to:net.N13) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_28",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_29",
"connected_source_port_ids": [
"source_port_29"
],
"connected_source_net_ids": [
"source_net_14"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".diode-1 > .pin2 to net.N19",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net14"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_29",
"message": "<trace#4249(from:.diode-1 > .pin2 to:net.N19) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_29",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_30",
"connected_source_port_ids": [
"source_port_31"
],
"connected_source_net_ids": [
"source_net_6"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".diode-2 > .pin2 to net.N13",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_30",
"message": "<trace#4250(from:.diode-2 > .pin2 to:net.N13) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_30",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_31",
"connected_source_port_ids": [
"source_port_30"
],
"connected_source_net_ids": [
"source_net_16"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".diode-2 > .pin1 to net.N18",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net16"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_31",
"message": "<trace#4251(from:.diode-2 > .pin1 to:net.N18) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_31",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_32",
"connected_source_port_ids": [
"source_port_33"
],
"connected_source_net_ids": [
"source_net_19"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-1 > .pin3 to net.N1",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net19"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_32",
"message": "<trace#4252(from:.transistor-1 > .pin3 to:net.N1) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_32",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_33",
"connected_source_port_ids": [
"source_port_34"
],
"connected_source_net_ids": [
"source_net_9"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-1 > .pin2 to net.N3",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_33",
"message": "<trace#4253(from:.transistor-1 > .pin2 to:net.N3) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_33",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_34",
"connected_source_port_ids": [
"source_port_32"
],
"connected_source_net_ids": [
"source_net_20"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-1 > .pin1 to net.N24",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net20"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_34",
"message": "<trace#4254(from:.transistor-1 > .pin1 to:net.N24) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_34",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_35",
"connected_source_port_ids": [
"source_port_37"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-2 > .pin2 to net.N7",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_35",
"message": "<trace#4255(from:.transistor-2 > .pin2 to:net.N7) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_35",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_36",
"connected_source_port_ids": [
"source_port_36"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-2 > .pin3 to net.N7",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_36",
"message": "<trace#4256(from:.transistor-2 > .pin3 to:net.N7) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_36",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_37",
"connected_source_port_ids": [
"source_port_35"
],
"connected_source_net_ids": [
"source_net_15"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".transistor-2 > .pin1 to net.N8",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_37",
"message": "<trace#4257(from:.transistor-2 > .pin1 to:net.N8) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_37",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_38",
"connected_source_port_ids": [
"source_port_45"
],
"connected_source_net_ids": [
"source_net_21"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-1 > .pin8 to net.N2",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net21"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_38",
"message": "<trace#4258(from:.chip-1 > .pin8 to:net.N2) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_38",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_39",
"connected_source_port_ids": [
"source_port_42"
],
"connected_source_net_ids": [
"source_net_7"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-1 > .pin5 to net.N5",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_39",
"message": "<trace#4259(from:.chip-1 > .pin5 to:net.N5) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_39",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_40",
"connected_source_port_ids": [
"source_port_40"
],
"connected_source_net_ids": [
"source_net_4"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-1 > .pin3 to net.N12",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_40",
"message": "<trace#4260(from:.chip-1 > .pin3 to:net.N12) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_40",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_41",
"connected_source_port_ids": [
"source_port_43"
],
"connected_source_net_ids": [
"source_net_16"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-1 > .pin6 to net.N18",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net16"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_41",
"message": "<trace#4261(from:.chip-1 > .pin6 to:net.N18) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_41",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_42",
"connected_source_port_ids": [
"source_port_41"
],
"connected_source_net_ids": [
"source_net_14"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-1 > .pin4 to net.N19",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net14"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_42",
"message": "<trace#4262(from:.chip-1 > .pin4 to:net.N19) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_42",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_43",
"connected_source_port_ids": [
"source_port_38"
],
"connected_source_net_ids": [
"source_net_8"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-1 > .pin1 to net.N20",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_43",
"message": "<trace#4263(from:.chip-1 > .pin1 to:net.N20) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_43",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_44",
"connected_source_port_ids": [
"source_port_39"
],
"connected_source_net_ids": [
"source_net_8"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-1 > .pin2 to net.N20",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_44",
"message": "<trace#4264(from:.chip-1 > .pin2 to:net.N20) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_44",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_45",
"connected_source_port_ids": [
"source_port_44"
],
"connected_source_net_ids": [
"source_net_18"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-1 > .pin7 to net.N22",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_45",
"message": "<trace#4265(from:.chip-1 > .pin7 to:net.N22) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_45",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_46",
"connected_source_port_ids": [
"source_port_48"
],
"connected_source_net_ids": [
"source_net_2"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-2 > .pin3 to net.N4",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_46",
"message": "<trace#4266(from:.chip-2 > .pin3 to:net.N4) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_46",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_47",
"connected_source_port_ids": [
"source_port_49"
],
"connected_source_net_ids": [
"source_net_2"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-2 > .pin4 to net.N4",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_47",
"message": "<trace#4267(from:.chip-2 > .pin4 to:net.N4) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_47",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_48",
"connected_source_port_ids": [
"source_port_51"
],
"connected_source_net_ids": [
"source_net_11"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-2 > .pin6 to net.N9",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_48",
"message": "<trace#4268(from:.chip-2 > .pin6 to:net.N9) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_48",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_49",
"connected_source_port_ids": [
"source_port_53"
],
"connected_source_net_ids": [
"source_net_11"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-2 > .pin8 to net.N9",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_49",
"message": "<trace#4269(from:.chip-2 > .pin8 to:net.N9) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_49",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_50",
"connected_source_port_ids": [
"source_port_50"
],
"connected_source_net_ids": [
"source_net_22"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-2 > .pin5 to net.N21",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net22"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_50",
"message": "<trace#4270(from:.chip-2 > .pin5 to:net.N21) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_50",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_51",
"connected_source_port_ids": [
"source_port_47"
],
"connected_source_net_ids": [
"source_net_18"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-2 > .pin2 to net.N22",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_51",
"message": "<trace#4271(from:.chip-2 > .pin2 to:net.N22) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_51",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_52",
"connected_source_port_ids": [
"source_port_52"
],
"connected_source_net_ids": [
"source_net_20"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-2 > .pin7 to net.N24",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net20"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_52",
"message": "<trace#4272(from:.chip-2 > .pin7 to:net.N24) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_52",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_53",
"connected_source_port_ids": [
"source_port_46"
],
"connected_source_net_ids": [
"source_net_17"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-2 > .pin1 to net.N25",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net17"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_53",
"message": "<trace#4273(from:.chip-2 > .pin1 to:net.N25) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_53",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_54",
"connected_source_port_ids": [
"source_port_60"
],
"connected_source_net_ids": [
"source_net_21"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-3 > .pin7 to net.N2",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net21"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_54",
"message": "<trace#4274(from:.chip-3 > .pin7 to:net.N2) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_54",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_55",
"connected_source_port_ids": [
"source_port_54"
],
"connected_source_net_ids": [
"source_net_21"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-3 > .pin1 to net.N2",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net21"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_55",
"message": "<trace#4275(from:.chip-3 > .pin1 to:net.N2) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_55",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_56",
"connected_source_port_ids": [
"source_port_59"
],
"connected_source_net_ids": [
"source_net_23"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-3 > .pin6 to net.N6",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net23"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_56",
"message": "<trace#4276(from:.chip-3 > .pin6 to:net.N6) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_56",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_57",
"connected_source_port_ids": [
"source_port_56"
],
"connected_source_net_ids": [
"source_net_23"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-3 > .pin3 to net.N6",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net23"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_57",
"message": "<trace#4277(from:.chip-3 > .pin3 to:net.N6) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_57",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_58",
"connected_source_port_ids": [
"source_port_55"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-3 > .pin2 to net.N7",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_58",
"message": "<trace#4278(from:.chip-3 > .pin2 to:net.N7) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_58",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_59",
"connected_source_port_ids": [
"source_port_61"
],
"connected_source_net_ids": [
"source_net_24"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-3 > .pin8 to net.N10",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net24"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_59",
"message": "<trace#4279(from:.chip-3 > .pin8 to:net.N10) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_59",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_60",
"connected_source_port_ids": [
"source_port_58"
],
"connected_source_net_ids": [
"source_net_22"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-3 > .pin5 to net.N21",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net22"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_60",
"message": "<trace#4280(from:.chip-3 > .pin5 to:net.N21) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_60",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_61",
"connected_source_port_ids": [
"source_port_57"
],
"connected_source_net_ids": [
"source_net_10"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-3 > .pin4 to net.N23",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_61",
"message": "<trace#4281(from:.chip-3 > .pin4 to:net.N23) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_61",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_62",
"connected_source_port_ids": [
"source_port_66"
],
"connected_source_net_ids": [
"source_net_9"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-4 > .pin5 to net.N3",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_62",
"message": "<trace#4282(from:.chip-4 > .pin5 to:net.N3) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_62",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_63",
"connected_source_port_ids": [
"source_port_65"
],
"connected_source_net_ids": [
"source_net_2"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-4 > .pin4 to net.N4",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_63",
"message": "<trace#4283(from:.chip-4 > .pin4 to:net.N4) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_63",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_64",
"connected_source_port_ids": [
"source_port_69"
],
"connected_source_net_ids": [
"source_net_15"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-4 > .pin8 to net.N8",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net15"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_64",
"message": "<trace#4284(from:.chip-4 > .pin8 to:net.N8) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_64",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_65",
"connected_source_port_ids": [
"source_port_67"
],
"connected_source_net_ids": [
"source_net_24"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-4 > .pin6 to net.N10",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net24"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_65",
"message": "<trace#4285(from:.chip-4 > .pin6 to:net.N10) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_65",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_66",
"connected_source_port_ids": [
"source_port_63"
],
"connected_source_net_ids": [
"source_net_24"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-4 > .pin2 to net.N10",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net24"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_66",
"message": "<trace#4286(from:.chip-4 > .pin2 to:net.N10) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_66",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_67",
"connected_source_port_ids": [
"source_port_64"
],
"connected_source_net_ids": [
"source_net_25"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-4 > .pin3 to net.N16",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net25"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_67",
"message": "<trace#4287(from:.chip-4 > .pin3 to:net.N16) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_67",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_68",
"connected_source_port_ids": [
"source_port_62"
],
"connected_source_net_ids": [
"source_net_14"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-4 > .pin1 to net.N19",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net14"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_68",
"message": "<trace#4288(from:.chip-4 > .pin1 to:net.N19) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_68",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_69",
"connected_source_port_ids": [
"source_port_68"
],
"connected_source_net_ids": [
"source_net_5"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-4 > .pin7 to net.N26",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_69",
"message": "<trace#4289(from:.chip-4 > .pin7 to:net.N26) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_69",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_70",
"connected_source_port_ids": [
"source_port_72"
],
"connected_source_net_ids": [
"source_net_19"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-5 > .pin3 to net.N1",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net19"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_70",
"message": "<trace#4290(from:.chip-5 > .pin3 to:net.N1) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_70",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_71",
"connected_source_port_ids": [
"source_port_70"
],
"connected_source_net_ids": [
"source_net_21"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-5 > .pin1 to net.N2",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net21"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_71",
"message": "<trace#4291(from:.chip-5 > .pin1 to:net.N2) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_71",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_72",
"connected_source_port_ids": [
"source_port_77"
],
"connected_source_net_ids": [
"source_net_3"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-5 > .pin8 to net.N11",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_72",
"message": "<trace#4292(from:.chip-5 > .pin8 to:net.N11) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_72",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_73",
"connected_source_port_ids": [
"source_port_76"
],
"connected_source_net_ids": [
"source_net_25"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-5 > .pin7 to net.N16",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net25"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_73",
"message": "<trace#4293(from:.chip-5 > .pin7 to:net.N16) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_73",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_74",
"connected_source_port_ids": [
"source_port_74"
],
"connected_source_net_ids": [
"source_net_13"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-5 > .pin5 to net.N17",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net13"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_74",
"message": "<trace#4294(from:.chip-5 > .pin5 to:net.N17) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_74",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_75",
"connected_source_port_ids": [
"source_port_75"
],
"connected_source_net_ids": [
"source_net_18"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-5 > .pin6 to net.N22",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net18"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_75",
"message": "<trace#4295(from:.chip-5 > .pin6 to:net.N22) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_75",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_76",
"connected_source_port_ids": [
"source_port_71"
],
"connected_source_net_ids": [
"source_net_17"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-5 > .pin2 to net.N25",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net17"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_76",
"message": "<trace#4296(from:.chip-5 > .pin2 to:net.N25) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_76",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_77",
"connected_source_port_ids": [
"source_port_73"
],
"connected_source_net_ids": [
"source_net_5"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".chip-5 > .pin4 to net.N26",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_77",
"message": "<trace#4297(from:.chip-5 > .pin4 to:net.N26) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_77",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_78",
"connected_source_port_ids": [
"source_port_81"
],
"connected_source_net_ids": [
"source_net_19"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-1 > .pin4 to net.N1",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net19"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_78",
"message": "<trace#4298(from:.pinhead-1 > .pin4 to:net.N1) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_78",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_79",
"connected_source_port_ids": [
"source_port_83"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-1 > .pin6 to net.N14",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_79",
"message": "<trace#4299(from:.pinhead-1 > .pin6 to:net.N14) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_79",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_80",
"connected_source_port_ids": [
"source_port_82"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-1 > .pin5 to net.N14",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_80",
"message": "<trace#4300(from:.pinhead-1 > .pin5 to:net.N14) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_80",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_81",
"connected_source_port_ids": [
"source_port_80"
],
"connected_source_net_ids": [
"source_net_16"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-1 > .pin3 to net.N18",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net16"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_81",
"message": "<trace#4301(from:.pinhead-1 > .pin3 to:net.N18) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_81",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_82",
"connected_source_port_ids": [
"source_port_78"
],
"connected_source_net_ids": [
"source_net_8"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-1 > .pin1 to net.N20",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_82",
"message": "<trace#4302(from:.pinhead-1 > .pin1 to:net.N20) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_82",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_83",
"connected_source_port_ids": [
"source_port_79"
],
"connected_source_net_ids": [
"source_net_22"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-1 > .pin2 to net.N21",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net22"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_83",
"message": "<trace#4303(from:.pinhead-1 > .pin2 to:net.N21) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_83",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_84",
"connected_source_port_ids": [
"source_port_86"
],
"connected_source_net_ids": [
"source_net_9"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-2 > .pin3 to net.N3",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_84",
"message": "<trace#4304(from:.pinhead-2 > .pin3 to:net.N3) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_84",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_85",
"connected_source_port_ids": [
"source_port_87"
],
"connected_source_net_ids": [
"source_net_24"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-2 > .pin4 to net.N10",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net24"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_85",
"message": "<trace#4305(from:.pinhead-2 > .pin4 to:net.N10) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_85",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_86",
"connected_source_port_ids": [
"source_port_85"
],
"connected_source_net_ids": [
"source_net_3"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-2 > .pin2 to net.N11",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_86",
"message": "<trace#4306(from:.pinhead-2 > .pin2 to:net.N11) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_86",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_87",
"connected_source_port_ids": [
"source_port_84"
],
"connected_source_net_ids": [
"source_net_13"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".pinhead-2 > .pin1 to net.N17",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net13"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_87",
"message": "<trace#4307(from:.pinhead-2 > .pin1 to:net.N17) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_87",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "schematic_component",
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"center": {
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"y": -22.699999999999996
},
"size": {
"width": 0.6,
"height": 0.65
},
"source_component_id": "source_component_0",
"is_box_with_pins": true,
"symbol_name": "boxresistor_right",
"symbol_display_value": "1kΩ",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_1",
"center": {
"x": 2.589727675,
"y": -24.579999999999995
},
"size": {
"width": 0.6,
"height": 0.65
},
"source_component_id": "source_component_1",
"is_box_with_pins": true,
"symbol_name": "boxresistor_right",
"symbol_display_value": "1kΩ",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_2",
"center": {
"x": 2.589727675,
"y": -26.459999999999994
},
"size": {
"width": 0.6,
"height": 0.65
},
"source_component_id": "source_component_2",
"is_box_with_pins": true,
"symbol_name": "boxresistor_right",
"symbol_display_value": "1kΩ",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_3",
"center": {
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"y": -28.339999999999993
},
"size": {
"width": 0.6,
"height": 0.65
},
"source_component_id": "source_component_3",
"is_box_with_pins": true,
"symbol_name": "boxresistor_right",
"symbol_display_value": "1kΩ",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_4",
"center": {
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"y": -30.21999999999999
},
"size": {
"width": 0.6,
"height": 0.65
},
"source_component_id": "source_component_4",
"is_box_with_pins": true,
"symbol_name": "boxresistor_right",
"symbol_display_value": "1kΩ",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
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"center": {
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"y": -32.099999999999994
},
"size": {
"width": 0.6,
"height": 0.65
},
"source_component_id": "source_component_5",
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"symbol_name": "boxresistor_right",
"symbol_display_value": "1kΩ",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_6",
"center": {
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"y": 2.2699999999999996
},
"size": {
"width": 0.6,
"height": 0.65
},
"source_component_id": "source_component_6",
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"symbol_name": "boxresistor_right",
"symbol_display_value": "1kΩ",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
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"center": {
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},
"size": {
"width": 0.6,
"height": 0.65
},
"source_component_id": "source_component_7",
"is_box_with_pins": true,
"symbol_name": "boxresistor_right",
"symbol_display_value": "1kΩ",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_8",
"center": {
"x": -2.3899999999999997,
"y": 4.2299999999999995
},
"size": {
"width": 0.6,
"height": 0.65
},
"source_component_id": "source_component_8",
"is_box_with_pins": true,
"symbol_name": "capacitor_right",
"symbol_display_value": "0.1uF",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_9",
"center": {
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"y": 6.06
},
"size": {
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},
"source_component_id": "source_component_9",
"is_box_with_pins": true,
"symbol_name": "capacitor_right",
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"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
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"center": {
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"y": 6.06
},
"size": {
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"height": 0.65
},
"source_component_id": "source_component_10",
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"symbol_name": "capacitor_right",
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"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
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"center": {
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"y": 8.1
},
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"height": 0.65
},
"source_component_id": "source_component_11",
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"symbol_name": "capacitor_right",
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"schematic_group_id": "schematic_group_0"
},
{
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"center": {
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},
"size": {
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"height": 0.4599472908242199
},
"source_component_id": "source_component_12",
"is_box_with_pins": true,
"symbol_name": "inductor_right",
"symbol_display_value": "10µH",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
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"center": {
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},
"size": {
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"height": 0.4599472908242199
},
"source_component_id": "source_component_13",
"is_box_with_pins": true,
"symbol_name": "inductor_right",
"symbol_display_value": "10µH",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_14",
"center": {
"x": -7.887499999999999,
"y": 12.250805524999999
},
"size": {
"width": 1.04,
"height": 0.54
},
"source_component_id": "source_component_14",
"is_box_with_pins": true,
"symbol_name": "diode_right",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_15",
"center": {
"x": -10.1325,
"y": 13.960805525
},
"size": {
"width": 1.04,
"height": 0.54
},
"source_component_id": "source_component_15",
"is_box_with_pins": true,
"symbol_name": "diode_right",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_16",
"center": {
"x": 0,
"y": -20.915
},
"size": {
"width": 1.1,
"height": 0.8300000000000001
},
"source_component_id": "source_component_16",
"is_box_with_pins": true,
"symbol_name": "pnp_bipolar_transistor_right",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_17",
"center": {
"x": 2.5947276749999997,
"y": -18.885
},
"size": {
"width": 1.1,
"height": 0.8300000000000001
},
"source_component_id": "source_component_17",
"is_box_with_pins": true,
"symbol_name": "pnp_bipolar_transistor_right",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_18",
"center": {
"x": 0,
"y": 0
},
"rotation": 0,
"size": {
"width": 0.4,
"height": 1
},
"pin_spacing": 0.2,
"port_labels": {},
"source_component_id": "source_component_18",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_text",
"schematic_text_id": "schematic_text_0",
"text": "GENERIC",
"schematic_component_id": "schematic_component_18",
"anchor": "left",
"rotation": 0,
"position": {
"x": -0.2,
"y": -0.63
},
"color": "#006464",
"font_size": 0.18
},
{
"type": "schematic_text",
"schematic_text_id": "schematic_text_1",
"text": "chip-1",
"schematic_component_id": "schematic_component_18",
"anchor": "left",
"rotation": 0,
"position": {
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"y": 0.63
},
"color": "#006464",
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},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_19",
"center": {
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"y": -2.9999999999999996
},
"rotation": 0,
"size": {
"width": 0.4,
"height": 1
},
"pin_spacing": 0.2,
"port_labels": {},
"source_component_id": "source_component_19",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_text",
"schematic_text_id": "schematic_text_2",
"text": "GENERIC",
"schematic_component_id": "schematic_component_19",
"anchor": "left",
"rotation": 0,
"position": {
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},
"color": "#006464",
"font_size": 0.18
},
{
"type": "schematic_text",
"schematic_text_id": "schematic_text_3",
"text": "chip-2",
"schematic_component_id": "schematic_component_19",
"anchor": "left",
"rotation": 0,
"position": {
"x": -0.2,
"y": -2.3699999999999997
},
"color": "#006464",
"font_size": 0.18
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_20",
"center": {
"x": 0,
"y": -6
},
"rotation": 0,
"size": {
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"height": 1
},
"pin_spacing": 0.2,
"port_labels": {},
"source_component_id": "source_component_20",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_text",
"schematic_text_id": "schematic_text_4",
"text": "GENERIC",
"schematic_component_id": "schematic_component_20",
"anchor": "left",
"rotation": 0,
"position": {
"x": -0.2,
"y": -6.63
},
"color": "#006464",
"font_size": 0.18
},
{
"type": "schematic_text",
"schematic_text_id": "schematic_text_5",
"text": "chip-3",
"schematic_component_id": "schematic_component_20",
"anchor": "left",
"rotation": 0,
"position": {
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"y": -5.37
},
"color": "#006464",
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},
{
"type": "schematic_component",
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"center": {
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"y": -9
},
"rotation": 0,
"size": {
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"height": 1
},
"pin_spacing": 0.2,
"port_labels": {},
"source_component_id": "source_component_21",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_text",
"schematic_text_id": "schematic_text_6",
"text": "GENERIC",
"schematic_component_id": "schematic_component_21",
"anchor": "left",
"rotation": 0,
"position": {
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"y": -9.63
},
"color": "#006464",
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},
{
"type": "schematic_text",
"schematic_text_id": "schematic_text_7",
"text": "chip-4",
"schematic_component_id": "schematic_component_21",
"anchor": "left",
"rotation": 0,
"position": {
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"y": -8.37
},
"color": "#006464",
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},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_22",
"center": {
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"y": -12
},
"rotation": 0,
"size": {
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"height": 1
},
"pin_spacing": 0.2,
"port_labels": {},
"source_component_id": "source_component_22",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_text",
"schematic_text_id": "schematic_text_8",
"text": "GENERIC",
"schematic_component_id": "schematic_component_22",
"anchor": "left",
"rotation": 0,
"position": {
"x": -0.2,
"y": -12.63
},
"color": "#006464",
"font_size": 0.18
},
{
"type": "schematic_text",
"schematic_text_id": "schematic_text_9",
"text": "chip-5",
"schematic_component_id": "schematic_component_22",
"anchor": "left",
"rotation": 0,
"position": {
"x": -0.2,
"y": -11.37
},
"color": "#006464",
"font_size": 0.18
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_23",
"center": {
"x": 0,
"y": -15.2
},
"rotation": 0,
"size": {
"width": 0.4,
"height": 1.4
},
"port_arrangement": {
"right_side": {
"direction": "top-to-bottom",
"pins": [
"pin1",
"pin2",
"pin3",
"pin4",
"pin5",
"pin6"
]
}
},
"pin_spacing": 0.2,
"port_labels": {},
"source_component_id": "source_component_23",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_text",
"schematic_text_id": "schematic_text_10",
"text": "",
"schematic_component_id": "schematic_component_23",
"anchor": "left",
"rotation": 0,
"position": {
"x": -0.2,
"y": -16.029999999999998
},
"color": "#006464",
"font_size": 0.18
},
{
"type": "schematic_text",
"schematic_text_id": "schematic_text_11",
"text": "pinhead-1",
"schematic_component_id": "schematic_component_23",
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"rotation": 0,
"position": {
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},
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},
{
"type": "schematic_component",
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"center": {
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"y": -18.4
},
"rotation": 0,
"size": {
"width": 0.4,
"height": 1
},
"port_arrangement": {
"right_side": {
"direction": "top-to-bottom",
"pins": [
"pin1",
"pin2",
"pin3",
"pin4"
]
}
},
"pin_spacing": 0.2,
"port_labels": {},
"source_component_id": "source_component_24",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_text",
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"anchor": "left",
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"position": {
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},
"color": "#006464",
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},
{
"type": "schematic_text",
"schematic_text_id": "schematic_text_13",
"text": "pinhead-2",
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"anchor": "left",
"rotation": 0,
"position": {
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"y": -17.77
},
"color": "#006464",
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},
{
"type": "schematic_group",
"schematic_group_id": "schematic_group_0",
"is_subcircuit": true,
"subcircuit_id": "subcircuit_source_group_0",
"name": "unnamed_board1",
"center": {
"x": 0,
"y": 0
},
"width": 0,
"height": 0,
"schematic_component_ids": [],
"source_group_id": "source_group_0",
"show_as_schematic_box": false
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_0",
"schematic_component_id": "schematic_component_0",
"center": {
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"y": -22.699999999999996
},
"source_port_id": "source_port_0",
"facing_direction": "left",
"distance_from_component_edge": 0.4,
"pin_number": 1,
"display_pin_label": "anode",
"is_connected": true
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_1",
"schematic_component_id": "schematic_component_0",
"center": {
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"y": -22.699999999999996
},
"source_port_id": "source_port_1",
"facing_direction": "right",
"distance_from_component_edge": 0.4,
"pin_number": 2,
"display_pin_label": "cathode",
"is_connected": true
},
{
"type": "schematic_port",
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"x": 0,
"y": 180,
"z": 0
},
"pcb_component_id": "pcb_component_17",
"source_component_id": "source_component_17",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "SOT-223"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_18",
"position": {
"x": 3,
"y": -26,
"z": -0.7
},
"rotation": {
"x": 0,
"y": 180,
"z": 0
},
"pcb_component_id": "pcb_component_18",
"source_component_id": "source_component_18",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "pinrow8"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_19",
"position": {
"x": 11,
"y": 10,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 0
},
"pcb_component_id": "pcb_component_19",
"source_component_id": "source_component_19",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "soic8"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_20",
"position": {
"x": 11,
"y": -10,
"z": -0.7
},
"rotation": {
"x": 0,
"y": 180,
"z": 0
},
"pcb_component_id": "pcb_component_20",
"source_component_id": "source_component_20",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "dip8"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_21",
"position": {
"x": 11,
"y": 22,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 0
},
"pcb_component_id": "pcb_component_21",
"source_component_id": "source_component_21",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "dip8"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_22",
"position": {
"x": -2,
"y": 2,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 0
},
"pcb_component_id": "pcb_component_22",
"source_component_id": "source_component_22",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "dip8"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_23",
"position": {
"x": -13,
"y": 12,
"z": -0.7
},
"rotation": {
"x": 0,
"y": 180,
"z": 270
},
"pcb_component_id": "pcb_component_23",
"source_component_id": "source_component_23",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "pinrow6"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_24",
"position": {
"x": -3,
"y": -10,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 90
},
"pcb_component_id": "pcb_component_24",
"source_component_id": "source_component_24",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "pinrow4"
},
{
"type": "source_component_pins_underspecified_warning",
"source_component_pins_underspecified_warning_id": "source_component_pins_underspecified_warning_0",
"warning_type": "source_component_pins_underspecified_warning",
"message": "All pins on chip-1 are underspecified (no pinAttributes set)",
"source_component_id": "source_component_18",
"source_port_ids": [
"source_port_38",
"source_port_39",
"source_port_40",
"source_port_41",
"source_port_42",
"source_port_43",
"source_port_44",
"source_port_45"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_component_pins_underspecified_warning",
"source_component_pins_underspecified_warning_id": "source_component_pins_underspecified_warning_1",
"warning_type": "source_component_pins_underspecified_warning",
"message": "All pins on chip-2 are underspecified (no pinAttributes set)",
"source_component_id": "source_component_19",
"source_port_ids": [
"source_port_46",
"source_port_47",
"source_port_48",
"source_port_49",
"source_port_50",
"source_port_51",
"source_port_52",
"source_port_53"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_component_pins_underspecified_warning",
"source_component_pins_underspecified_warning_id": "source_component_pins_underspecified_warning_2",
"warning_type": "source_component_pins_underspecified_warning",
"message": "All pins on chip-3 are underspecified (no pinAttributes set)",
"source_component_id": "source_component_20",
"source_port_ids": [
"source_port_54",
"source_port_55",
"source_port_56",
"source_port_57",
"source_port_58",
"source_port_59",
"source_port_60",
"source_port_61"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_component_pins_underspecified_warning",
"source_component_pins_underspecified_warning_id": "source_component_pins_underspecified_warning_3",
"warning_type": "source_component_pins_underspecified_warning",
"message": "All pins on chip-4 are underspecified (no pinAttributes set)",
"source_component_id": "source_component_21",
"source_port_ids": [
"source_port_62",
"source_port_63",
"source_port_64",
"source_port_65",
"source_port_66",
"source_port_67",
"source_port_68",
"source_port_69"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_component_pins_underspecified_warning",
"source_component_pins_underspecified_warning_id": "source_component_pins_underspecified_warning_4",
"warning_type": "source_component_pins_underspecified_warning",
"message": "All pins on chip-5 are underspecified (no pinAttributes set)",
"source_component_id": "source_component_22",
"source_port_ids": [
"source_port_70",
"source_port_71",
"source_port_72",
"source_port_73",
"source_port_74",
"source_port_75",
"source_port_76",
"source_port_77"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_power_pin_defined_warning",
"source_no_power_pin_defined_warning_id": "source_no_power_pin_defined_warning_0",
"warning_type": "source_no_power_pin_defined_warning",
"message": "chip-1 has no pin with requires_power=true",
"source_component_id": "source_component_18",
"source_port_ids": [
"source_port_38",
"source_port_39",
"source_port_40",
"source_port_41",
"source_port_42",
"source_port_43",
"source_port_44",
"source_port_45"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_power_pin_defined_warning",
"source_no_power_pin_defined_warning_id": "source_no_power_pin_defined_warning_1",
"warning_type": "source_no_power_pin_defined_warning",
"message": "chip-2 has no pin with requires_power=true",
"source_component_id": "source_component_19",
"source_port_ids": [
"source_port_46",
"source_port_47",
"source_port_48",
"source_port_49",
"source_port_50",
"source_port_51",
"source_port_52",
"source_port_53"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_power_pin_defined_warning",
"source_no_power_pin_defined_warning_id": "source_no_power_pin_defined_warning_2",
"warning_type": "source_no_power_pin_defined_warning",
"message": "chip-3 has no pin with requires_power=true",
"source_component_id": "source_component_20",
"source_port_ids": [
"source_port_54",
"source_port_55",
"source_port_56",
"source_port_57",
"source_port_58",
"source_port_59",
"source_port_60",
"source_port_61"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_power_pin_defined_warning",
"source_no_power_pin_defined_warning_id": "source_no_power_pin_defined_warning_3",
"warning_type": "source_no_power_pin_defined_warning",
"message": "chip-4 has no pin with requires_power=true",
"source_component_id": "source_component_21",
"source_port_ids": [
"source_port_62",
"source_port_63",
"source_port_64",
"source_port_65",
"source_port_66",
"source_port_67",
"source_port_68",
"source_port_69"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_power_pin_defined_warning",
"source_no_power_pin_defined_warning_id": "source_no_power_pin_defined_warning_4",
"warning_type": "source_no_power_pin_defined_warning",
"message": "chip-5 has no pin with requires_power=true",
"source_component_id": "source_component_22",
"source_port_ids": [
"source_port_70",
"source_port_71",
"source_port_72",
"source_port_73",
"source_port_74",
"source_port_75",
"source_port_76",
"source_port_77"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_ground_pin_defined_warning",
"source_no_ground_pin_defined_warning_id": "source_no_ground_pin_defined_warning_0",
"warning_type": "source_no_ground_pin_defined_warning",
"message": "chip-1 has no pin with requires_ground=true",
"source_component_id": "source_component_18",
"source_port_ids": [
"source_port_38",
"source_port_39",
"source_port_40",
"source_port_41",
"source_port_42",
"source_port_43",
"source_port_44",
"source_port_45"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_ground_pin_defined_warning",
"source_no_ground_pin_defined_warning_id": "source_no_ground_pin_defined_warning_1",
"warning_type": "source_no_ground_pin_defined_warning",
"message": "chip-2 has no pin with requires_ground=true",
"source_component_id": "source_component_19",
"source_port_ids": [
"source_port_46",
"source_port_47",
"source_port_48",
"source_port_49",
"source_port_50",
"source_port_51",
"source_port_52",
"source_port_53"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_ground_pin_defined_warning",
"source_no_ground_pin_defined_warning_id": "source_no_ground_pin_defined_warning_2",
"warning_type": "source_no_ground_pin_defined_warning",
"message": "chip-3 has no pin with requires_ground=true",
"source_component_id": "source_component_20",
"source_port_ids": [
"source_port_54",
"source_port_55",
"source_port_56",
"source_port_57",
"source_port_58",
"source_port_59",
"source_port_60",
"source_port_61"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_ground_pin_defined_warning",
"source_no_ground_pin_defined_warning_id": "source_no_ground_pin_defined_warning_3",
"warning_type": "source_no_ground_pin_defined_warning",
"message": "chip-4 has no pin with requires_ground=true",
"source_component_id": "source_component_21",
"source_port_ids": [
"source_port_62",
"source_port_63",
"source_port_64",
"source_port_65",
"source_port_66",
"source_port_67",
"source_port_68",
"source_port_69"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_ground_pin_defined_warning",
"source_no_ground_pin_defined_warning_id": "source_no_ground_pin_defined_warning_4",
"warning_type": "source_no_ground_pin_defined_warning",
"message": "chip-5 has no pin with requires_ground=true",
"source_component_id": "source_component_22",
"source_port_ids": [
"source_port_70",
"source_port_71",
"source_port_72",
"source_port_73",
"source_port_74",
"source_port_75",
"source_port_76",
"source_port_77"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_YpU6V2leey",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<pinheader#3925 name=\".pinhead-1\" /> footprint \"pinrow6\" does not match supplier footprint jlcpcb:C492420 (copper IoU 0.255).",
"source_component_id": "source_component_23",
"pcb_component_id": "pcb_component_23",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C492420",
"footprint_copper_intersection_over_union": 0.255
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_gj02u09Zmo",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<capacitor#3642 name=\".capacitor-1\" /> footprint \"0402\" does not match supplier footprint jlcpcb:C1525 (copper IoU 0.7249).",
"source_component_id": "source_component_8",
"pcb_component_id": "pcb_component_8",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C1525",
"footprint_copper_intersection_over_union": 0.7249
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_kNaJ3PIACn",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<resistor#3551 name=\".resistor-2\" /> footprint \"0402\" does not match supplier footprint jlcpcb:C11702 (copper IoU 0.7741).",
"source_component_id": "source_component_1",
"pcb_component_id": "pcb_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C11702",
"footprint_copper_intersection_over_union": 0.7741
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_rT6CJSynJc",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<resistor#3564 name=\".resistor-3\" /> footprint \"0603\" does not match supplier footprint jlcpcb:C21190 (copper IoU 0.4221).",
"source_component_id": "source_component_2",
"pcb_component_id": "pcb_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C21190",
"footprint_copper_intersection_over_union": 0.4221
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_Lfz6LGa4m9",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<capacitor#3654 name=\".capacitor-2\" /> footprint \"0603\" does not match supplier footprint jlcpcb:C14663 (copper IoU 0.4495).",
"source_component_id": "source_component_9",
"pcb_component_id": "pcb_component_9",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C14663",
"footprint_copper_intersection_over_union": 0.4495
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_3yGVbjPhAv",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<resistor#3590 name=\".resistor-5\" /> footprint \"0603\" does not match supplier footprint jlcpcb:C21190 (copper IoU 0.6063).",
"source_component_id": "source_component_4",
"pcb_component_id": "pcb_component_4",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C21190",
"footprint_copper_intersection_over_union": 0.6063
},
{
"type": "source_project_metadata",
"source_filesystem_md5_hash": "3fbdf5adbcca5810255d1c815ce964f6"
}
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