tscircuit/autorouting-dataset-01
This code manages the hardware and electronic components for circuit design and PCB layout, defining components like resistors, capacitors, transistors, connectors, and footprints, and providing tools for component placement, PCB topology, and electrical connections.
- Version
- 1.0.102
- License
- unset
- Stars
- 4
dist/lib/circuit/circuit008/circuit.json
PCB
Schematic
[
{
"type": "source_group",
"source_group_id": "source_group_0",
"is_subcircuit": true,
"was_automatically_named": true,
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_0",
"name": "AO11",
"pin_number": 1,
"port_hints": [
"AO11",
"pin1",
"1"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_port",
"source_port_id": "source_port_1",
"name": "AO12",
"pin_number": 2,
"port_hints": [
"AO12",
"pin2",
"2"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_port",
"source_port_id": "source_port_2",
"name": "PGND11",
"pin_number": 3,
"port_hints": [
"PGND11",
"pin3",
"3"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_port",
"source_port_id": "source_port_3",
"name": "PGND12",
"pin_number": 4,
"port_hints": [
"PGND12",
"pin4",
"4"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_port",
"source_port_id": "source_port_4",
"name": "AO21",
"pin_number": 5,
"port_hints": [
"AO21",
"pin5",
"5"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_port",
"source_port_id": "source_port_5",
"name": "AO22",
"pin_number": 6,
"port_hints": [
"AO22",
"pin6",
"6"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_port",
"source_port_id": "source_port_6",
"name": "BO21",
"pin_number": 7,
"port_hints": [
"BO21",
"pin7",
"7"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_port",
"source_port_id": "source_port_7",
"name": "BO22",
"pin_number": 8,
"port_hints": [
"BO22",
"pin8",
"8"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_port",
"source_port_id": "source_port_8",
"name": "PGND21",
"pin_number": 9,
"port_hints": [
"PGND21",
"pin9",
"9"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_port",
"source_port_id": "source_port_9",
"name": "PGND22",
"pin_number": 10,
"port_hints": [
"PGND22",
"pin10",
"10"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_port",
"source_port_id": "source_port_10",
"name": "BO11",
"pin_number": 11,
"port_hints": [
"BO11",
"pin11",
"11"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_port",
"source_port_id": "source_port_11",
"name": "BO12",
"pin_number": 12,
"port_hints": [
"BO12",
"pin12",
"12"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_port",
"source_port_id": "source_port_12",
"name": "VM2",
"pin_number": 13,
"port_hints": [
"VM2",
"pin13",
"13"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_port",
"source_port_id": "source_port_13",
"name": "VM3",
"pin_number": 14,
"port_hints": [
"VM3",
"pin14",
"14"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_port",
"source_port_id": "source_port_14",
"name": "PWMB",
"pin_number": 15,
"port_hints": [
"PWMB",
"pin15",
"15"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_port",
"source_port_id": "source_port_15",
"name": "BIN2",
"pin_number": 16,
"port_hints": [
"BIN2",
"pin16",
"16"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_port",
"source_port_id": "source_port_16",
"name": "BIN1",
"pin_number": 17,
"port_hints": [
"BIN1",
"pin17",
"17"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_port",
"source_port_id": "source_port_17",
"name": "GND",
"pin_number": 18,
"port_hints": [
"GND",
"pin18",
"18"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_port",
"source_port_id": "source_port_18",
"name": "STBY",
"pin_number": 19,
"port_hints": [
"STBY",
"pin19",
"19"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_port",
"source_port_id": "source_port_19",
"name": "VCC",
"pin_number": 20,
"port_hints": [
"VCC",
"pin20",
"20"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_port",
"source_port_id": "source_port_20",
"name": "AIN1",
"pin_number": 21,
"port_hints": [
"AIN1",
"pin21",
"21"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_port",
"source_port_id": "source_port_21",
"name": "AIN2",
"pin_number": 22,
"port_hints": [
"AIN2",
"pin22",
"22"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_port",
"source_port_id": "source_port_22",
"name": "PWMA",
"pin_number": 23,
"port_hints": [
"PWMA",
"pin23",
"23"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net13"
},
{
"type": "source_port",
"source_port_id": "source_port_23",
"name": "VM1",
"pin_number": 24,
"port_hints": [
"VM1",
"pin24",
"24"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_component",
"source_component_id": "source_component_0",
"ftype": "simple_chip",
"name": "M1",
"manufacturer_part_number": "TB6612FNG_C_8_EL",
"supplier_part_numbers": {
"jlcpcb": [
"C141517"
]
},
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_24",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"1"
],
"source_component_id": "source_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_port",
"source_port_id": "source_port_25",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"2"
],
"source_component_id": "source_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_port",
"source_port_id": "source_port_26",
"name": "pin3",
"pin_number": 3,
"port_hints": [
"pin3",
"3"
],
"source_component_id": "source_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_port",
"source_port_id": "source_port_27",
"name": "pin4",
"pin_number": 4,
"port_hints": [
"pin4",
"4"
],
"source_component_id": "source_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_port",
"source_port_id": "source_port_28",
"name": "pin5",
"pin_number": 5,
"port_hints": [
"pin5",
"5"
],
"source_component_id": "source_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_port",
"source_port_id": "source_port_29",
"name": "pin6",
"pin_number": 6,
"port_hints": [
"pin6",
"6"
],
"source_component_id": "source_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_port",
"source_port_id": "source_port_30",
"name": "pin7",
"pin_number": 7,
"port_hints": [
"pin7",
"7"
],
"source_component_id": "source_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_port",
"source_port_id": "source_port_31",
"name": "pin8",
"pin_number": 8,
"port_hints": [
"pin8",
"8"
],
"source_component_id": "source_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_component",
"source_component_id": "source_component_1",
"ftype": "simple_pin_header",
"name": "JP1",
"supplier_part_numbers": {
"jlcpcb": [
"C492421",
"C492407",
"C192300"
]
},
"pin_count": 8,
"gender": "male",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_32",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"1"
],
"source_component_id": "source_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net13"
},
{
"type": "source_port",
"source_port_id": "source_port_33",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"2"
],
"source_component_id": "source_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_port",
"source_port_id": "source_port_34",
"name": "pin3",
"pin_number": 3,
"port_hints": [
"pin3",
"3"
],
"source_component_id": "source_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_port",
"source_port_id": "source_port_35",
"name": "pin4",
"pin_number": 4,
"port_hints": [
"pin4",
"4"
],
"source_component_id": "source_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_port",
"source_port_id": "source_port_36",
"name": "pin5",
"pin_number": 5,
"port_hints": [
"pin5",
"5"
],
"source_component_id": "source_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_port",
"source_port_id": "source_port_37",
"name": "pin6",
"pin_number": 6,
"port_hints": [
"pin6",
"6"
],
"source_component_id": "source_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_port",
"source_port_id": "source_port_38",
"name": "pin7",
"pin_number": 7,
"port_hints": [
"pin7",
"7"
],
"source_component_id": "source_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_port",
"source_port_id": "source_port_39",
"name": "pin8",
"pin_number": 8,
"port_hints": [
"pin8",
"8"
],
"source_component_id": "source_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_component",
"source_component_id": "source_component_2",
"ftype": "simple_pin_header",
"name": "JP2",
"supplier_part_numbers": {
"jlcpcb": [
"C492421",
"C492407",
"C192300"
]
},
"pin_count": 8,
"gender": "male",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_40",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"1",
"left"
],
"source_component_id": "source_component_3",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_port",
"source_port_id": "source_port_41",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"2",
"right"
],
"source_component_id": "source_component_3",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_component",
"source_component_id": "source_component_3",
"ftype": "simple_capacitor",
"name": "C1",
"supplier_part_numbers": {
"jlcpcb": [
"C1525",
"C307331",
"C60474"
]
},
"capacitance": 1e-7,
"max_decoupling_trace_length": 1,
"display_capacitance": "0.1uF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_42",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"1",
"left"
],
"source_component_id": "source_component_4",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_port",
"source_port_id": "source_port_43",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"2",
"right"
],
"source_component_id": "source_component_4",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_component",
"source_component_id": "source_component_4",
"ftype": "simple_capacitor",
"name": "C3",
"supplier_part_numbers": {
"jlcpcb": [
"C15525",
"C23692971",
"C315248"
]
},
"capacitance": 0.00001,
"max_decoupling_trace_length": 1,
"display_capacitance": "10uF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_44",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"1",
"left"
],
"source_component_id": "source_component_5",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_port",
"source_port_id": "source_port_45",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"2",
"right"
],
"source_component_id": "source_component_5",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_component",
"source_component_id": "source_component_5",
"ftype": "simple_capacitor",
"name": "C2",
"supplier_part_numbers": {
"jlcpcb": [
"C1525",
"C307331",
"C60474"
]
},
"capacitance": 1e-7,
"display_capacitance": "0.1uF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_net",
"source_net_id": "source_net_0",
"name": "VCC",
"member_source_group_ids": [],
"is_ground": false,
"is_power": true,
"is_positive_voltage_source": true,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_net",
"source_net_id": "source_net_1",
"name": "GND",
"member_source_group_ids": [],
"is_ground": true,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_property_ignored_warning",
"source_property_ignored_warning_id": "source_property_ignored_warning_0",
"source_component_id": "",
"property_name": "autorouter",
"subcircuit_id": "subcircuit_source_group_0",
"error_type": "source_property_ignored_warning",
"message": "The \"auto_cloud\" autorouter is deprecated, so autorouting has been disabled for this subcircuit. Use the default autorouter and introduce <autoroutingphase /> or <fanout /> elements as needed."
},
{
"type": "source_board",
"source_board_id": "source_board_0",
"source_group_id": "source_group_0"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_0",
"connected_source_port_ids": [
"source_port_31",
"source_port_41"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"max_length": 1,
"display_name": ".JP1 > .pin8 to .C1 > .neg",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_0",
"message": "<trace#622(from:.JP1 > .pin8 to:.C1 > .neg) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_0",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_1",
"connected_source_port_ids": [
"source_port_31",
"source_port_42"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"max_length": 1,
"display_name": ".JP1 > .pin8 to .C3 > .pos",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_1",
"message": "<trace#623(from:.JP1 > .pin8 to:.C3 > .pos) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_1",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_2",
"connected_source_port_ids": [
"source_port_31",
"source_port_23"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".JP1 > .pin8 to .M1 > .pin24",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_2",
"message": "<trace#624(from:.JP1 > .pin8 to:.M1 > .pin24) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_2",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_3",
"connected_source_port_ids": [
"source_port_31",
"source_port_13"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".JP1 > .pin8 to .M1 > .pin14",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_3",
"message": "<trace#625(from:.JP1 > .pin8 to:.M1 > .pin14) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_3",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_4",
"connected_source_port_ids": [
"source_port_30"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".JP1 > .pin7 to net.VCC",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_4",
"message": "<trace#626(from:.JP1 > .pin7 to:net.VCC) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_4",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_5",
"connected_source_port_ids": [
"source_port_29"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".JP1 > .pin6 to net.GND",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_5",
"message": "<trace#627(from:.JP1 > .pin6 to:net.GND) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_5",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_6",
"connected_source_port_ids": [
"source_port_28",
"source_port_0"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".JP1 > .pin5 to .M1 > .pin1",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_6",
"message": "<trace#628(from:.JP1 > .pin5 to:.M1 > .pin1) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_6",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_7",
"connected_source_port_ids": [
"source_port_28",
"source_port_1"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".JP1 > .pin5 to .M1 > .pin2",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_7",
"message": "<trace#629(from:.JP1 > .pin5 to:.M1 > .pin2) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_7",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_8",
"connected_source_port_ids": [
"source_port_27",
"source_port_4"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".JP1 > .pin4 to .M1 > .pin5",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_8",
"message": "<trace#630(from:.JP1 > .pin4 to:.M1 > .pin5) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_8",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_9",
"connected_source_port_ids": [
"source_port_27",
"source_port_5"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".JP1 > .pin4 to .M1 > .pin6",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_9",
"message": "<trace#631(from:.JP1 > .pin4 to:.M1 > .pin6) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_9",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_10",
"connected_source_port_ids": [
"source_port_26",
"source_port_6"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".JP1 > .pin3 to .M1 > .pin7",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_10",
"message": "<trace#632(from:.JP1 > .pin3 to:.M1 > .pin7) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_10",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_11",
"connected_source_port_ids": [
"source_port_26",
"source_port_7"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".JP1 > .pin3 to .M1 > .pin8",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_11",
"message": "<trace#633(from:.JP1 > .pin3 to:.M1 > .pin8) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_11",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_12",
"connected_source_port_ids": [
"source_port_25",
"source_port_10"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".JP1 > .pin2 to .M1 > .pin11",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_12",
"message": "<trace#634(from:.JP1 > .pin2 to:.M1 > .pin11) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_12",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_13",
"connected_source_port_ids": [
"source_port_25",
"source_port_11"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".JP1 > .pin2 to .M1 > .pin12",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_13",
"message": "<trace#635(from:.JP1 > .pin2 to:.M1 > .pin12) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_13",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_14",
"connected_source_port_ids": [
"source_port_24"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".JP1 > .pin1 to net.GND",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_14",
"message": "<trace#636(from:.JP1 > .pin1 to:net.GND) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_14",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_15",
"connected_source_port_ids": [
"source_port_39"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".JP2 > .pin8 to net.GND",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_15",
"message": "<trace#637(from:.JP2 > .pin8 to:net.GND) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_15",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_16",
"connected_source_port_ids": [
"source_port_38",
"source_port_14"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".JP2 > .pin7 to .M1 > .pin15",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net7"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_16",
"message": "<trace#638(from:.JP2 > .pin7 to:.M1 > .pin15) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_16",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_17",
"connected_source_port_ids": [
"source_port_37",
"source_port_15"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".JP2 > .pin6 to .M1 > .pin16",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net8"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_17",
"message": "<trace#639(from:.JP2 > .pin6 to:.M1 > .pin16) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_17",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_18",
"connected_source_port_ids": [
"source_port_36",
"source_port_16"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".JP2 > .pin5 to .M1 > .pin17",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net9"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_18",
"message": "<trace#640(from:.JP2 > .pin5 to:.M1 > .pin17) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_18",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_19",
"connected_source_port_ids": [
"source_port_35",
"source_port_18"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".JP2 > .pin4 to .M1 > .pin19",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net10"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_19",
"message": "<trace#641(from:.JP2 > .pin4 to:.M1 > .pin19) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_19",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_20",
"connected_source_port_ids": [
"source_port_34",
"source_port_20"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".JP2 > .pin3 to .M1 > .pin21",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net11"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_20",
"message": "<trace#642(from:.JP2 > .pin3 to:.M1 > .pin21) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_20",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_21",
"connected_source_port_ids": [
"source_port_33",
"source_port_21"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".JP2 > .pin2 to .M1 > .pin22",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net12"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_21",
"message": "<trace#643(from:.JP2 > .pin2 to:.M1 > .pin22) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_21",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_22",
"connected_source_port_ids": [
"source_port_32",
"source_port_22"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".JP2 > .pin1 to .M1 > .pin23",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net13"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_22",
"message": "<trace#644(from:.JP2 > .pin1 to:.M1 > .pin23) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_22",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_23",
"connected_source_port_ids": [
"source_port_40"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"max_length": 1,
"display_name": ".C1 > .pos to net.GND",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_23",
"message": "<trace#645(from:.C1 > .pos to:net.GND) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_23",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_24",
"connected_source_port_ids": [
"source_port_43"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"max_length": 1,
"display_name": ".C3 > .neg to net.GND",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_24",
"message": "<trace#646(from:.C3 > .neg to:net.GND) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_24",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_25",
"connected_source_port_ids": [
"source_port_41",
"source_port_23"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"max_length": 1,
"display_name": ".C1 > .neg to .M1 > .pin24",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_25",
"message": "<trace#647(from:.C1 > .neg to:.M1 > .pin24) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_25",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_26",
"connected_source_port_ids": [
"source_port_42",
"source_port_23"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"max_length": 1,
"display_name": ".C3 > .pos to .M1 > .pin24",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_26",
"message": "<trace#648(from:.C3 > .pos to:.M1 > .pin24) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_26",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_27",
"connected_source_port_ids": [
"source_port_41",
"source_port_13"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
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"display_name": ".C1 > .neg to .M1 > .pin14",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_27",
"message": "<trace#649(from:.C1 > .neg to:.M1 > .pin14) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_27",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_28",
"connected_source_port_ids": [
"source_port_42",
"source_port_13"
],
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"subcircuit_id": "subcircuit_source_group_0",
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"display_name": ".C3 > .pos to .M1 > .pin14",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
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"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_28",
"message": "<trace#650(from:.C3 > .pos to:.M1 > .pin14) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_28",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_29",
"connected_source_port_ids": [
"source_port_41",
"source_port_12"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
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"display_name": ".C1 > .neg to .M1 > .pin13",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_29",
"message": "<trace#651(from:.C1 > .neg to:.M1 > .pin13) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_29",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
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"source_port_42",
"source_port_12"
],
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"display_name": ".C3 > .pos to .M1 > .pin13",
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},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_30",
"message": "<trace#652(from:.C3 > .pos to:.M1 > .pin13) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_30",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_31",
"connected_source_port_ids": [
"source_port_44"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".C2 > .pos to net.VCC",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_31",
"message": "<trace#653(from:.C2 > .pos to:net.VCC) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_31",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
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"connected_source_port_ids": [
"source_port_45"
],
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"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".C2 > .neg to net.GND",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_32",
"message": "<trace#654(from:.C2 > .neg to:net.GND) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_32",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
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"connected_source_port_ids": [
"source_port_17"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".M1 > .pin18 to net.GND",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_33",
"message": "<trace#655(from:.M1 > .pin18 to:net.GND) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_33",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_34",
"connected_source_port_ids": [
"source_port_19"
],
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"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".M1 > .pin20 to net.VCC",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_34",
"message": "<trace#656(from:.M1 > .pin20 to:net.VCC) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_34",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_35",
"connected_source_port_ids": [
"source_port_2"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".M1 > .pin3 to net.GND",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_35",
"message": "<trace#657(from:.M1 > .pin3 to:net.GND) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_35",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_36",
"connected_source_port_ids": [
"source_port_3"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".M1 > .pin4 to net.GND",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_36",
"message": "<trace#658(from:.M1 > .pin4 to:net.GND) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_36",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_37",
"connected_source_port_ids": [
"source_port_8"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".M1 > .pin9 to net.GND",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_37",
"message": "<trace#659(from:.M1 > .pin9 to:net.GND) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_37",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_38",
"connected_source_port_ids": [
"source_port_9"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".M1 > .pin10 to net.GND",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_unnamed_trace_warning",
"source_unnamed_trace_warning_id": "source_unnamed_trace_warning_38",
"message": "<trace#660(from:.M1 > .pin10 to:net.GND) /> is missing a name. Add a name prop to make the trace easier to identify.",
"source_trace_id": "source_trace_38",
"subcircuit_id": "subcircuit_source_group_0",
"warning_type": "source_unnamed_trace_warning"
},
{
"type": "schematic_component",
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"center": {
"x": 0,
"y": 0
},
"rotation": 0,
"size": {
"width": 1.2000000000000002,
"height": 2.5999999999999996
},
"pin_spacing": 0.2,
"port_labels": {
"pin1": "AO11",
"pin2": "AO12",
"pin3": "PGND11",
"pin4": "PGND12",
"pin5": "AO21",
"pin6": "AO22",
"pin7": "BO21",
"pin8": "BO22",
"pin9": "PGND21",
"pin10": "PGND22",
"pin11": "BO11",
"pin12": "BO12",
"pin13": "VM2",
"pin14": "VM3",
"pin15": "PWMB",
"pin16": "BIN2",
"pin17": "BIN1",
"pin18": "GND",
"pin19": "STBY",
"pin20": "VCC",
"pin21": "AIN1",
"pin22": "AIN2",
"pin23": "PWMA",
"pin24": "VM1"
},
"source_component_id": "source_component_0",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_text",
"schematic_text_id": "schematic_text_0",
"text": "TB6612FNG_C_8_EL",
"schematic_component_id": "schematic_component_0",
"anchor": "left",
"rotation": 0,
"position": {
"x": -0.6000000000000001,
"y": -1.4299999999999997
},
"color": "#006464",
"font_size": 0.18
},
{
"type": "schematic_text",
"schematic_text_id": "schematic_text_1",
"text": "M1",
"schematic_component_id": "schematic_component_0",
"anchor": "left",
"rotation": 0,
"position": {
"x": -0.6000000000000001,
"y": 1.4299999999999997
},
"color": "#006464",
"font_size": 0.18
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_1",
"center": {
"x": -4,
"y": 0
},
"rotation": 0,
"size": {
"width": 0.4,
"height": 1.7999999999999998
},
"port_arrangement": {
"right_side": {
"direction": "top-to-bottom",
"pins": [
"pin1",
"pin2",
"pin3",
"pin4",
"pin5",
"pin6",
"pin7",
"pin8"
]
}
},
"pin_spacing": 0.2,
"port_labels": {},
"source_component_id": "source_component_1",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_text",
"schematic_text_id": "schematic_text_2",
"text": "",
"schematic_component_id": "schematic_component_1",
"anchor": "left",
"rotation": 0,
"position": {
"x": -4.2,
"y": -1.0299999999999998
},
"color": "#006464",
"font_size": 0.18
},
{
"type": "schematic_text",
"schematic_text_id": "schematic_text_3",
"text": "JP1",
"schematic_component_id": "schematic_component_1",
"anchor": "left",
"rotation": 0,
"position": {
"x": -4.2,
"y": 1.0299999999999998
},
"color": "#006464",
"font_size": 0.18
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_2",
"center": {
"x": 4,
"y": 0
},
"rotation": 180,
"size": {
"width": 0.4,
"height": 1.7999999999999998
},
"port_arrangement": {
"left_side": {
"direction": "top-to-bottom",
"pins": [
"pin1",
"pin2",
"pin3",
"pin4",
"pin5",
"pin6",
"pin7",
"pin8"
]
}
},
"pin_spacing": 0.2,
"port_labels": {},
"source_component_id": "source_component_2",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_text",
"schematic_text_id": "schematic_text_4",
"text": "",
"schematic_component_id": "schematic_component_2",
"anchor": "left",
"rotation": 0,
"position": {
"x": 3.8,
"y": -1.0299999999999998
},
"color": "#006464",
"font_size": 0.18
},
{
"type": "schematic_text",
"schematic_text_id": "schematic_text_5",
"text": "JP2",
"schematic_component_id": "schematic_component_2",
"anchor": "left",
"rotation": 0,
"position": {
"x": 3.8,
"y": 1.0299999999999998
},
"color": "#006464",
"font_size": 0.18
},
{
"type": "schematic_component",
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"center": {
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"y": 3
},
"size": {
"width": 0.9,
"height": 0.6
},
"source_component_id": "source_component_3",
"is_box_with_pins": true,
"symbol_name": "capacitor_up",
"symbol_display_value": "0.1uF",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
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"center": {
"x": -1,
"y": 3
},
"size": {
"width": 0.9,
"height": 0.6
},
"source_component_id": "source_component_4",
"is_box_with_pins": true,
"symbol_name": "capacitor_up",
"symbol_display_value": "10uF",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_component",
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"center": {
"x": 2.5,
"y": 3
},
"size": {
"width": 0.9,
"height": 0.6
},
"source_component_id": "source_component_5",
"is_box_with_pins": true,
"symbol_name": "capacitor_up",
"symbol_display_value": "0.1uF",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_group",
"schematic_group_id": "schematic_group_0",
"is_subcircuit": true,
"subcircuit_id": "subcircuit_source_group_0",
"name": "unnamed_board1",
"center": {
"x": 0,
"y": 0
},
"width": 0,
"height": 0,
"schematic_component_ids": [],
"source_group_id": "source_group_0",
"show_as_schematic_box": false
},
{
"type": "schematic_port",
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"schematic_component_id": "schematic_component_0",
"center": {
"x": -1,
"y": 1.0999999999999999
},
"source_port_id": "source_port_0",
"facing_direction": "left",
"distance_from_component_edge": 0.4,
"side_of_component": "left",
"pin_number": 1,
"true_ccw_index": 0,
"display_pin_label": "AO11",
"is_connected": true
},
{
"type": "schematic_port",
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"schematic_component_id": "schematic_component_0",
"center": {
"x": -1,
"y": 0.8999999999999999
},
"source_port_id": "source_port_1",
"facing_direction": "left",
"distance_from_component_edge": 0.4,
"side_of_component": "left",
"pin_number": 2,
"true_ccw_index": 1,
"display_pin_label": "AO12",
"is_connected": true
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_2",
"schematic_component_id": "schematic_component_0",
"center": {
"x": -1,
"y": 0.6999999999999998
},
"source_port_id": "source_port_2",
"facing_direction": "left",
"distance_from_component_edge": 0.4,
"side_of_component": "left",
"pin_number": 3,
"true_ccw_index": 2,
"display_pin_label": "PGND11",
"is_connected": true
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_3",
"schematic_component_id": "schematic_component_0",
"center": {
"x": -1,
"y": 0.4999999999999998
},
"source_port_id": "source_port_3",
"facing_direction": "left",
"distance_from_component_edge": 0.4,
"side_of_component": "left",
"pin_number": 4,
"true_ccw_index": 3,
"display_pin_label": "PGND12",
"is_connected": true
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_4",
"schematic_component_id": "schematic_component_0",
"center": {
"x": -1,
"y": 0.2999999999999998
},
"source_port_id": "source_port_4",
"facing_direction": "left",
"distance_from_component_edge": 0.4,
"side_of_component": "left",
"pin_number": 5,
"true_ccw_index": 4,
"display_pin_label": "AO21",
"is_connected": true
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_5",
"schematic_component_id": "schematic_component_0",
"center": {
"x": -1,
"y": 0.09999999999999987
},
"source_port_id": "source_port_5",
"facing_direction": "left",
"distance_from_component_edge": 0.4,
"side_of_component": "left",
"pin_number": 6,
"true_ccw_index": 5,
"display_pin_label": "AO22",
"is_connected": true
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_6",
"schematic_component_id": "schematic_component_0",
"center": {
"x": -1,
"y": -0.10000000000000009
},
"source_port_id": "source_port_6",
"facing_direction": "left",
"distance_from_component_edge": 0.4,
"side_of_component": "left",
"pin_number": 7,
"true_ccw_index": 6,
"display_pin_label": "BO21",
"is_connected": true
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_7",
"schematic_component_id": "schematic_component_0",
"center": {
"x": -1,
"y": -0.30000000000000004
},
"source_port_id": "source_port_7",
"facing_direction": "left",
"distance_from_component_edge": 0.4,
"side_of_component": "left",
"pin_number": 8,
"true_ccw_index": 7,
"display_pin_label": "BO22",
"is_connected": true
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_8",
"schematic_component_id": "schematic_component_0",
"center": {
"x": -1,
"y": -0.5
},
"source_port_id": "source_port_8",
"facing_direction": "left",
"distance_from_component_edge": 0.4,
"side_of_component": "left",
"pin_number": 9,
"true_ccw_index": 8,
"display_pin_label": "PGND21",
"is_connected": true
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_9",
"schematic_component_id": "schematic_component_0",
"center": {
"x": -1,
"y": -0.7
},
"source_port_id": "source_port_9",
"facing_direction": "left",
"distance_from_component_edge": 0.4,
"side_of_component": "left",
"pin_number": 10,
"true_ccw_index": 9,
"display_pin_label": "PGND22",
"is_connected": true
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_10",
"schematic_component_id": "schematic_component_0",
"center": {
"x": -1,
"y": -0.8999999999999999
},
"source_port_id": "source_port_10",
"facing_direction": "left",
"distance_from_component_edge": 0.4,
"side_of_component": "left",
"pin_number": 11,
"true_ccw_index": 10,
"display_pin_label": "BO11",
"is_connected": true
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_11",
"schematic_component_id": "schematic_component_0",
"center": {
"x": -1,
"y": -1.0999999999999999
},
"source_port_id": "source_port_11",
"facing_direction": "left",
"distance_from_component_edge": 0.4,
"side_of_component": "left",
"pin_number": 12,
"true_ccw_index": 11,
"display_pin_label": "BO12",
"is_connected": true
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_12",
"schematic_component_id": "schematic_component_0",
"center": {
"x": 1,
"y": -1.0999999999999999
},
"source_port_id": "source_port_12",
"facing_direction": "right",
"distance_from_component_edge": 0.4,
"side_of_component": "right",
"pin_number": 13,
"true_ccw_index": 12,
"display_pin_label": "VM2",
"is_connected": true
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_13",
"schematic_component_id": "schematic_component_0",
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},
{
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},
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},
{
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"warning_type": "pcb_manual_edit_conflict_warning",
"message": "<capacitor#586 name=\".C1\" /> has both manual placement and prop coordinates. pcbX and pcbY will be used. Remove pcbX/pcbY or clear the manual placement.",
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"subcircuit_id": "subcircuit_source_group_0",
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},
{
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},
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},
{
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"message": "<capacitor#598 name=\".C3\" /> has both manual placement and prop coordinates. pcbX and pcbY will be used. Remove pcbX/pcbY or clear the manual placement.",
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},
{
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},
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},
{
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},
{
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},
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{
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{
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{
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{
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{
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{
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{
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{
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{
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{
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{
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{
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{
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{
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{
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{
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},
{
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{
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},
{
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{
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},
{
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{
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},
{
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{
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{
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{
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},
{
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{
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},
{
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{
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{
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{
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{
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{
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{
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{
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],
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{
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{
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{
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{
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{
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],
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{
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],
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{
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],
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{
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{
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],
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{
"type": "pcb_port",
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],
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{
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},
{
"type": "pcb_port",
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],
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},
{
"type": "pcb_port",
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],
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},
{
"type": "pcb_port",
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],
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"source_port_id": "source_port_22"
},
{
"type": "pcb_port",
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{
"type": "pcb_port",
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],
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{
"type": "pcb_port",
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],
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},
{
"type": "pcb_port",
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],
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},
{
"type": "pcb_port",
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],
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},
{
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],
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},
{
"type": "pcb_port",
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],
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},
{
"type": "pcb_port",
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],
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},
{
"type": "pcb_port",
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],
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},
{
"type": "pcb_port",
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],
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},
{
"type": "pcb_port",
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],
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},
{
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],
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},
{
"type": "pcb_port",
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],
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},
{
"type": "pcb_port",
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],
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},
{
"type": "pcb_port",
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],
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},
{
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],
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},
{
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"layers": [
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],
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"x": 9,
"y": 8.89,
"source_port_id": "source_port_39"
},
{
"type": "pcb_port",
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"pcb_component_id": "pcb_component_3",
"layers": [
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],
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"x": -7.51,
"y": 8,
"source_port_id": "source_port_40"
},
{
"type": "pcb_port",
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"pcb_component_id": "pcb_component_3",
"layers": [
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],
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"y": 8,
"source_port_id": "source_port_41"
},
{
"type": "pcb_port",
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"layers": [
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],
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},
{
"type": "pcb_port",
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"layers": [
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],
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"y": 8,
"source_port_id": "source_port_43"
},
{
"type": "pcb_port",
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"pcb_component_id": "pcb_component_5",
"layers": [
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],
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"x": 4.49,
"y": 8,
"source_port_id": "source_port_44"
},
{
"type": "pcb_port",
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"pcb_component_id": "pcb_component_5",
"layers": [
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],
"subcircuit_id": "subcircuit_source_group_0",
"x": 5.51,
"y": 8,
"source_port_id": "source_port_45"
},
{
"type": "cad_component",
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"position": {
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"y": 5.684341886080802e-14,
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},
"rotation": {
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"z": 0
},
"pcb_component_id": "pcb_component_0",
"source_component_id": "source_component_0",
"model_obj_url": "https://modelcdn.tscircuit.com/easyeda_models/download?uuid=9fcdeaf10ae24c4a8aa0d28b1d82c96d&pn=C141517&cachebust_origin=",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_1",
"position": {
"x": -9,
"y": 0,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 90
},
"pcb_component_id": "pcb_component_1",
"source_component_id": "source_component_1",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "pinrow8"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_2",
"position": {
"x": 9,
"y": 0,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 90
},
"pcb_component_id": "pcb_component_2",
"source_component_id": "source_component_2",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "pinrow8"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_3",
"position": {
"x": -7,
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"z": 0.7
},
"rotation": {
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"y": 0,
"z": 0
},
"pcb_component_id": "pcb_component_3",
"source_component_id": "source_component_3",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "cap0402"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_4",
"position": {
"x": -5,
"y": 8,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 0
},
"pcb_component_id": "pcb_component_4",
"source_component_id": "source_component_4",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "cap0402"
},
{
"type": "cad_component",
"cad_component_id": "cad_component_5",
"position": {
"x": 5,
"y": 8,
"z": 0.7
},
"rotation": {
"x": 0,
"y": 0,
"z": 0
},
"pcb_component_id": "pcb_component_5",
"source_component_id": "source_component_5",
"model_origin_alignment": "center_of_component_on_board_surface",
"anchor_alignment": "center_of_component_on_board_surface",
"footprinter_string": "cap0402"
},
{
"type": "pcb_courtyard_overlap_error",
"pcb_error_id": "pcb_courtyard_overlap_pcb_component_1_pcb_component_3",
"error_type": "pcb_courtyard_overlap_error",
"message": "Courtyard of JP1 overlaps with courtyard of C1",
"pcb_component_ids": [
"pcb_component_1",
"pcb_component_3"
],
"pcb_courtyard_overlap_error_id": "pcb_courtyard_overlap_error_0"
},
{
"type": "source_component_pins_underspecified_warning",
"source_component_pins_underspecified_warning_id": "source_component_pins_underspecified_warning_0",
"warning_type": "source_component_pins_underspecified_warning",
"message": "All pins on M1 are underspecified (no pinAttributes set)",
"source_component_id": "source_component_0",
"source_port_ids": [
"source_port_0",
"source_port_1",
"source_port_2",
"source_port_3",
"source_port_4",
"source_port_5",
"source_port_6",
"source_port_7",
"source_port_8",
"source_port_9",
"source_port_10",
"source_port_11",
"source_port_12",
"source_port_13",
"source_port_14",
"source_port_15",
"source_port_16",
"source_port_17",
"source_port_18",
"source_port_19",
"source_port_20",
"source_port_21",
"source_port_22",
"source_port_23"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_power_pin_defined_warning",
"source_no_power_pin_defined_warning_id": "source_no_power_pin_defined_warning_0",
"warning_type": "source_no_power_pin_defined_warning",
"message": "M1 has no pin with requires_power=true",
"source_component_id": "source_component_0",
"source_port_ids": [
"source_port_0",
"source_port_1",
"source_port_2",
"source_port_3",
"source_port_4",
"source_port_5",
"source_port_6",
"source_port_7",
"source_port_8",
"source_port_9",
"source_port_10",
"source_port_11",
"source_port_12",
"source_port_13",
"source_port_14",
"source_port_15",
"source_port_16",
"source_port_17",
"source_port_18",
"source_port_19",
"source_port_20",
"source_port_21",
"source_port_22",
"source_port_23"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_no_ground_pin_defined_warning",
"source_no_ground_pin_defined_warning_id": "source_no_ground_pin_defined_warning_0",
"warning_type": "source_no_ground_pin_defined_warning",
"message": "M1 has no pin with requires_ground=true",
"source_component_id": "source_component_0",
"source_port_ids": [
"source_port_0",
"source_port_1",
"source_port_2",
"source_port_3",
"source_port_4",
"source_port_5",
"source_port_6",
"source_port_7",
"source_port_8",
"source_port_9",
"source_port_10",
"source_port_11",
"source_port_12",
"source_port_13",
"source_port_14",
"source_port_15",
"source_port_16",
"source_port_17",
"source_port_18",
"source_port_19",
"source_port_20",
"source_port_21",
"source_port_22",
"source_port_23"
],
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_VInzDD1S6l",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<capacitor#610 name=\".C2\" /> footprint \"0402\" does not match supplier footprint jlcpcb:C1525 (copper IoU 0.7249).",
"source_component_id": "source_component_5",
"pcb_component_id": "pcb_component_5",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C1525",
"footprint_copper_intersection_over_union": 0.7249
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_VxSKED5a2N",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<capacitor#586 name=\".C1\" /> footprint \"0402\" does not match supplier footprint jlcpcb:C1525 (copper IoU 0.7249).",
"source_component_id": "source_component_3",
"pcb_component_id": "pcb_component_3",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C1525",
"footprint_copper_intersection_over_union": 0.7249
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_d1tfDt79wR",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<pinheader#559 name=\".JP2\" /> footprint \"pinrow8\" does not match supplier footprint jlcpcb:C492421 (copper IoU 0.2567).",
"source_component_id": "source_component_2",
"pcb_component_id": "pcb_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C492421",
"footprint_copper_intersection_over_union": 0.2567
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_RCf19UGIQw",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<pinheader#532 name=\".JP1\" /> footprint \"pinrow8\" does not match supplier footprint jlcpcb:C492421 (copper IoU 0.2567).",
"source_component_id": "source_component_1",
"pcb_component_id": "pcb_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C492421",
"footprint_copper_intersection_over_union": 0.2567
},
{
"type": "supplier_footprint_mismatch_warning",
"supplier_footprint_mismatch_warning_id": "supplier_footprint_mismatch_warning_uJBoiEa8MX",
"warning_type": "supplier_footprint_mismatch_warning",
"message": "<capacitor#598 name=\".C3\" /> footprint \"0402\" does not match supplier footprint jlcpcb:C15525 (copper IoU 0.7249).",
"source_component_id": "source_component_4",
"pcb_component_id": "pcb_component_4",
"subcircuit_id": "subcircuit_source_group_0",
"supplier_name": "jlcpcb",
"supplier_part_number": "C15525",
"footprint_copper_intersection_over_union": 0.7249
},
{
"type": "source_project_metadata",
"source_filesystem_md5_hash": "3fbdf5adbcca5810255d1c815ce964f6"
}
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