techmannih/nema34-mounted-stepper-controller
A USB-C PD-powered RP2040 motor controller with protected 48 V power, DRV8262 dual-bridge drive for a NEMA34 motor, regenerative-braking resistor, isolated sensing, hardware interlocks, and telemetry/status interfaces.
- Version
- 0.3.113
- License
- unset
- Stars
- 1
release/schematic-review-baseline.json
PCB
Schematic
{
"baseline_commit": "50350344ec36ee153ca9e64e8e67c66ce1141f8a",
"baseline_non_schematic_sha256": "685a122cdec94efc90c2189722b36771b50298108816cf03cb05112313ed2025",
"record_count": 6998,
"algorithm": "SHA-256 with recursively sorted object keys; record order retained. Exclude schematic_* and system_block_* records, source_project_metadata filesystem cache and cli_module_to_static_asset metadata. Reuse circuitSourceHash: round derived pcb_trace.trace_length to 1e-12 mm; coordinates, widths, nets and other geometry remain exact.",
"scope": "User-authorized DRV8262DDVR migration: actual PH/EN microstepping, MCP4822 references, R60/BZ1/U36/R66 stocked replacements, C96 bypass relocation and affected local routing. DATA-only MCU, independent brake, all four motor mounting holes and unrelated source content retained.",
"native_verification": {
"status": "paired-DRV8262DDVR-native-CAD-verified",
"paired_board_sha256": "000495f20437bd5cbef3d1ed4b5b1eb64360de8e61818af3300d16093b128255",
"byte_identical_to_baseline": false,
"unconnected_items": 0,
"schematic_parity_issues": 0,
"erc_violations": 0,
"retained_hole_clearance_errors": 8,
"retained_cosmetic_warnings": 488,
"fabrication_authorized": false
},
"previous_schematic_only_baseline": {
"baseline_commit": "34aca1af8736b482bd8edf86ec449a56c15d50c1",
"algorithm": "SHA-256 with recursively sorted object keys; record order retained. Exclude only schematic_* records, source_project_metadata filesystem cache and cli_module_to_static_asset metadata. Reuse circuitSourceHash: round derived pcb_trace.trace_length to 1e-12 mm; coordinates, widths, nets and other geometry remain exact.",
"baseline_non_schematic_sha256": "8331699b9c226e8d3a384a667d0a435e7fa8a5f39855e00b99a441bf5a3ff7de",
"record_count": 6596,
"baseline_native_board_sha256": "0455d7ba01ada4b5635d61e988f82bd3ad80fb59acb2ac50367179bc6c4703c6",
"scope": "Schematic organisation and documents only. All compiled source electrical records and PCB geometry must compare exactly. Native metadata may change when paired to new sheet hierarchy; copper requires a separate native geometry comparison.",
"native_verification": {
"paired_board_sha256": "0455d7ba01ada4b5635d61e988f82bd3ad80fb59acb2ac50367179bc6c4703c6",
"byte_identical_to_baseline": true,
"unconnected_items": 0,
"schematic_parity_issues": 0,
"erc_violations": 0,
"retained_hole_clearance_errors": 8,
"retained_cosmetic_warnings": 451,
"fabrication_authorized": false
},
"baseline_exact_non_schematic_sha256": "6cccbc12995ec8d62a1749aab18db9dc2690576ce320acb4267c2af9fa23a056",
"cross_platform_evidence": {
"workflow_run_id": 41679486520,
"artifact_id": 13252317121,
"mac_linux_record_count": 6596,
"only_differences": [
{
"field": "pcb_trace.trace_length",
"mac": 1.3870242929152334,
"linux": 1.3870242929152332
},
{
"field": "pcb_trace.trace_length",
"mac": 2.3614712022848914,
"linux": 2.361471202284891
},
{
"field": "pcb_trace.trace_length",
"mac": 1.5851258021515604,
"linux": 1.5851258021515602
}
]
}
},
"baseline_native_board_sha256": "000495f20437bd5cbef3d1ed4b5b1eb64360de8e61818af3300d16093b128255",
"previous_hardware_eco_baseline": {
"baseline_commit": "fd77f025d1031127cc8e40b0dd6028b1b08520cf",
"baseline_non_schematic_sha256": "d91d0047ef6002b6ed8693f6ec293083de094ddb8c6dc0fe13e0a637c95aa23d",
"baseline_native_board_sha256": "097e7d2f3bbe412744c118c06e71c14a7adf5d1f30942f13ad93497d7300a87a",
"record_count": 6836,
"scope": "User-authorized DATA-only MCU ECO: remove U26, isolate PD I2C/status with U39/U40, switch phase/encoder sensor power with U41, and revise C22/C23 bulk plus C18 ramp. Source topology/negative isolation tests and nine schematic style analyses pass. Native routing and fabrication qualification remain separate gates.",
"native_verification": {
"status": "paired-DATA-only-native-CAD-verified",
"paired_board_sha256": "097e7d2f3bbe412744c118c06e71c14a7adf5d1f30942f13ad93497d7300a87a",
"byte_identical_to_baseline": false,
"unconnected_items": 0,
"schematic_parity_issues": 0,
"erc_violations": 0,
"retained_hole_clearance_errors": 8,
"retained_cosmetic_warnings": 475,
"fabrication_authorized": false
}
},
"r65_supplier_substitution": {
"date": "2026-11-07",
"previous_non_schematic_sha256": "02090682f6276d7ae6e902b8b0507f834aa4bfd18a4b6652c6ab91095c9c2475",
"change": "R65 supplier_part_numbers C723637 to C328424. A record-by-record diff of the compiled circuit shows no other electrical or PCB record changed.",
"evidence": "sourcing/r65-substitution.json"
},
"encoder_via_resize": {
"date": "2026-11-07",
"previous_non_schematic_sha256": "66b1d6daf929243feb923bc63b786a742476444e63264868433fa75b4a2a3f8c",
"change": "User-requested board viaPadDiameter 0.6 to 0.45 and minViaPadDiameter 0.5 to 0.45. A record-by-record diff of the compiled circuit shows only pcb_board.min_via_pad_diameter, the one pcb_via outer_diameter and the inner1 pour brep_shape around that via changed, plus excluded build metadata.",
"evidence": "engineering/motor-a2-export-bridge.json via_resizes"
},
"c50_crystal_side_correction": {
"date": "2026-11-07",
"previous_non_schematic_sha256": "d51b2c1b443ed4090a4138c8baf4a15cac31bc5c4638497a818b753824af9401",
"change": "C50 pin 1 moved from OSC_OUT to XTAL_OUT so it loads the crystal side of R138. Native copper diff is exactly 2 modified, 2 removed and 1 added record.",
"evidence": "engineering/motor-a2-export-bridge.json c50_correction"
},
"crystal_swap": {
"date": "2026-11-07",
"previous_non_schematic_sha256": "fd41fffe4e1dd6d633dd974252db2f3430a7b4f679b7281ef1af87e300ce5805",
"change": "Y1 changed to ABM8-272-T3 and C49/C50 to 15 pF C1644. Nets, placement and copper are unchanged.",
"evidence": "sourcing/crystal-substitution.json"
}
}