shibosoftwaredev/f1c100s-linux-nema8-stepper-controller
Restores component part numbers and CAD models, removes test-point 3D bodies, and validates that solder paste exists only on top-side SMT pads without altering copper or DRC.
- Version
- 0.3.5
- License
- unset
- Stars
- 0
scripts/repair-saved-routes.mjs
import fs from "node:fs"
const file = new URL("../saved-board-traces.json", import.meta.url)
const traces = JSON.parse(fs.readFileSync(file, "utf8"))
const near = (a, b) => Math.abs(a - b) < 1e-9
const movePoint = (from, to) => {
for (const trace of traces) {
for (const point of trace.route ?? []) {
if (near(point.x, from.x) && near(point.y, from.y)) {
point.x = to.x
point.y = to.y
}
}
}
}
// Keep the USB-C A6/B6 join as a separate local trace. The routed USB_P branch
// must begin at A6 and end at the ESD array's D+ pad so connectivity metadata
// cannot accidentally attach the D+ route to D-.
const usbP = traces.find((trace) => trace.pcb_trace_id === "source_net_62_mst0_0")
if (!usbP) throw new Error("USB_P route not found")
usbP.connectsTo = ["pcb_port_486", "pcb_port_215"]
usbP.source_trace_id = "source_trace_90"
usbP.route = [
{ route_type: "wire", x: 4.249936, y: 25.6259568, width: 0.15, layer: "top", start_pcb_port_id: "pcb_port_215" },
{ route_type: "wire", x: 4.25, y: 23.7, width: 0.15, layer: "top" },
{ route_type: "via", x: 4.25, y: 23.7, from_layer: "top", to_layer: "inner2", via_diameter: 0.45, via_hole_diameter: 0.3 },
{ route_type: "wire", x: 4.25, y: 23.7, width: 0.15, layer: "inner2" },
{ route_type: "wire", x: 4.25, y: 21.8, width: 0.15, layer: "inner2" },
{ route_type: "wire", x: 5.85, y: 21.4, width: 0.15, layer: "inner2" },
{ route_type: "via", x: 5.85, y: 21.4, from_layer: "inner2", to_layer: "top", via_diameter: 0.45, via_hole_diameter: 0.3 },
{ route_type: "wire", x: 5.85, y: 21.4, width: 0.15, layer: "top" },
{ route_type: "wire", x: 5.3, y: 20.95, width: 0.15, layer: "top", end_pcb_port_id: "pcb_port_486" },
]
// Move the DRV8825 VREF escape below the divider pads, then cross on inner1.
const vref = traces.find((trace) => trace.pcb_trace_id === "source_net_50_mst1_0")
if (!vref) throw new Error("DRV_VREF route not found")
vref.route = [
{ route_type: "wire", x: 38.49, y: 5, width: 0.12, layer: "top", start_pcb_port_id: "pcb_port_569" },
{ route_type: "wire", x: 38.15, y: 5.2, width: 0.12, layer: "top" },
{ route_type: "via", x: 38.15, y: 5.2, from_layer: "top", to_layer: "bottom", via_diameter: 0.45, via_hole_diameter: 0.3 },
{ route_type: "wire", x: 38.15, y: 5.2, width: 0.12, layer: "bottom" },
{ route_type: "wire", x: 35.9, y: 4.7, width: 0.12, layer: "bottom" },
{ route_type: "via", x: 35.9, y: 4.7, from_layer: "bottom", to_layer: "top", via_diameter: 0.45, via_hole_diameter: 0.3 },
{ route_type: "wire", x: 35.9, y: 4.7, width: 0.12, layer: "top" },
{ route_type: "wire", x: 36.49, y: 5, width: 0.12, layer: "top", end_pcb_port_id: "pcb_port_571" },
]
// Shared W5500 3V3 junctions: move the upper junction away from DNC/SCLK and
// the lower junction below the LINKLED pad. Apply to every MST branch so the
// router still coalesces each shared via into one physical via.
movePoint(
{ x: -24.115061999999998, y: -17.55 },
{ x: -24.115061999999998, y: -19.9 },
)
movePoint(
{ x: -26.610060000000004, y: -27.637648723128944 },
{ x: -25.8, y: -28.4 },
)
fs.writeFileSync(file, `${JSON.stringify(traces, null, 2)}\n`)
