shibosoftwaredev/f1c100s-linux-nema8-stepper-controller

modules/f1c100s/docs/pin-attributes.md

# F1C100S pin attributes

Source: Allwinner F1C100S datasheet Rev 1.0, sections 4.1–4.3 and 5.2, pages 12–18:
https://linux-sunxi.org/images/b/ba/F1C100s_Datasheet_V1.0.pdf

All 88 package pins plus the exposed ground pad (89 in the footprint) have attributes. Configurable GPIO is bidirectional with internal pull capabilities and high-impedance capability. PC1 has a default internal pull-up. I2C, SPI and UART alternatives use supported tscircuit capability names; no active firmware function is assumed. Analog directions follow detailed pin descriptions. Touch-panel pins use bidirectional capability because their alternate UART/SPI functions include outputs; their touch ADC function is an analog input. USB is bidirectional. Ground includes TVGND (74), AGND (82) and the exposed pad.

Supply attributes use nominal voltages: I/O/USB/TV 3.3 V; core 1.1 V; DDR1 2.5 V; codec AVCC 2.8 V. Recommended ranges are respectively 3.0–3.6, 1.0–1.2, 2.3–2.7 and 2.5–3.1 V. The existing board core regulator is 1.2 V, at the recommended upper bound. The pinAttributes schema has no min/max voltage fields, so these ranges are documented here rather than encoded as invented properties. HPVCC has no separately specified voltage range in this datasheet; only a power requirement is assigned. SVREF is described only as power/reference, without a direction or nominal voltage; it remains a passive reference connection. Reference outputs are signal outputs, not general power sources. Decoupling is required on supply pins without inventing capacitor values.

The imported chip and the adapter that inflates every saved module profile share one attribute map, so board DRC receives the same attributes as freshly generated chips. No pads or copper are intentionally changed.