seveibar/usbc-pd-charger

PD_PROGRAMMING.md

# STUSB4710A NVM programming

The board will not be a correct multi-voltage PD source until the STUSB4710A non-volatile configuration matches the hardware feedback ladder.

## Required PDO table

| PDO | Voltage | Maximum current | Hardware selector | Calculated rail |
| --- | ---: | ---: | --- | ---: |
| 1 | 5 V | 3.0 A | no selector asserted | 5.02 V |
| 2 | 9 V | 2.0 A | SEL_PDO2 → FB_9 | 9.04 V |
| 3 | 12 V | 1.5 A | SEL_PDO3 → FB_12 | 12.03 V |
| 4 | 15 V | 1.2 A | SEL_PDO4 → FB_15 | 15.01 V |
| 5 | 20 V | 0.9 A | SEL_PDO5 → FB_20 | 19.99 V |

The current values cap every advertised mode at 18 W or less, leaving margin under the IRM-20-24 module's 21.6 W rating.

## Programming connections

J3 exposes the secondary-side I²C interface:

1. GND
2. 3V3
3. SDA
4. SCL

Use an ST-supported STUSB4710A NVM programming tool or equivalent I²C procedure. Preserve the PDO order shown above and configure the voltage/current pairs together. ST explicitly warns that the stored PDOs and the DC/DC feedback resistor configuration must agree.

## Safe procedure

1. Disconnect J1 completely from mains and remove R12.
2. Connect an isolated bench supply to J4 pin 1 (24 V) and pin 2 (GND). Start with a 100 mA current limit.
3. Confirm the 3V3 rail before attaching the programmer to J3.
4. Program the five PDOs, power-cycle, and read the NVM back.
5. With no USB-C sink attached, verify that VBUS remains disconnected and the regulator's default rail is about 5.0 V.
6. Attach a PD analyzer through a current-limited setup. Request each PDO in order and verify voltage, overshoot, current advertisement, and disconnect behavior.
7. Increase the bench-supply current limit only after the low-current checks pass.

Never connect an earth-referenced programmer or oscilloscope ground to this board while its primary side is energized. Use appropriately isolated test equipment and qualified mains-safety procedures.