seveibar/pedometer

REGION_ROUTING.md

> Historical experiment log. The active full-board design now passes raw DRC; see VALIDATION.md and REGIONAL_ROUTING.md. Referenced experiment files are archived outside the package in work/region-board/archived-project-artifacts/.

# Regional routing follow-up

**Historical report:** the active design now uses Pipeline 9 without custom callbacks. See [PIPELINE9_ONLY.md](PIPELINE9_ONLY.md).

The installed core (`@tscircuit/core` 0.0.1837) uses an autorouting phase's `region` when `reroute` is enabled. A region on an ordinary first-pass phase does not crop its input. Increasing the board's `autorouterEffortLevel` to `10x` still failed on the interrupt.

`routing/interrupt-router.ts` implements a bounded A* search through the supported `autorouter.algorithmFn` interface. The interrupt phase routes `net.ACCEL_INT1` inside x=6.2…15 mm, y=−5.5…7.4 mm. It checks pads, existing wires and physical via spans, preserves exact port endpoints, and emits ordinary PCB traces before raw DRC. The board clearance rules are unchanged. Its 0.1 mm search grid permits top, inner2 and bottom routing; the chosen route uses two vias.

A direct trace and named-net declaration originally caused the same interrupt connection to enter two phases. Both pins now connect only through the named net, assigned to phase 6.

Incremental trials:

| Trial | Single change | Result |
| --- | --- | --- |
| 01-region | Isolate interrupt, specify region | Pipeline 9 still fails; initial-pass region is not applied by core |
| 02-effort | Increase effort to 10x | Interrupt still fails |
| 03-algorithm | Add bounded A* algorithmFn | Custom route succeeds; duplicate named net remains in final phase |
| 04-net | Assign named net to custom phase | Custom route succeeds; duplicate direct trace remains |
| 05-single-net | Consolidate both endpoints onto one named net | Interrupt completed; final phase fails on DISP_MOSI |
| 06-mosi | Add one MOSI phase using Pipeline 9 | MOSI succeeds; final phase fails on VDDR |
| 07-vddr | Add one VDDR phase using Pipeline 9 | Fails on VDDR_mst2 |
| 08-vddr-tree | Use bounded A* tree callback for VDDR | All six terminals routed with four vias; final pass fails on MCU DCDC → inductor |

| 09-dcdc | Isolate MCU DCDC → inductor using Pipeline 9 | Still fails |
| 10-dcdc-astar | Use bounded A* for the inductor connection | Succeeds with two vias; final pass fails on CHG_LP |
| 11-chg-lp | Isolate CHG_LP using Pipeline 9 | Fails while processing a preloaded RESET_N route |
| 12-lp-tree | Route only the missing CHG_LP branch with bounded A* | Succeeds with two vias; final Pipeline 9 pass fails on DISP_RST |

Tests cover exact endpoint/port preservation, an obstruction forcing a two-via escape, and rejection of an impassable all-layer barrier. TypeScript checking and all five tests pass. These tests support the local algorithm; the full board still requires a successful raw DRC run.

## Retained result

Twelve phases complete, including four bounded custom phases (interrupt, VDDR, DCDC-to-inductor and CHG_LP). The final Pipeline 9 phase still fails on `DISP_RST`; the full board is incomplete. The raw validation contains one autorouter error, 141 disconnected-port errors and nine missing-trace errors because core commits the routing transaction only when all phases complete. No error records are filtered.

A separate scratch probe tried the same tree search over all remaining nets. It reached the battery net and found no path on the conservative grid; this broader fallback was not added to the board. This does not prove that a physical route is impossible.

`region-experiments/` retains phase inputs, outputs, images and logs. Historical source snapshots are records, not standalone importable projects. The current callback source and tests are in `routing/`; the final trial also includes a copy. `last-completed-phase.png` shows the last successful intermediate stage. The HTML viewer shows the incomplete raw full-board result. No fabrication export or new registry publication was made.