seveibar/pd-dual-stepper-controller
Bottom-side PCB silkscreen artwork consisting of embedded mirrored TS Circuit SVG logos, with via-clearance-aware lower-board placement.
- Version
- 0.1.0
- License
- unset
- Stars
- 0
Files in (root)/scripts
- __pycache__
- analyze-style.ts
- audit-driver-thermal-vias.py
- audit-dual-power.py
- audit-exported-clearances.py
- audit-ground-copper.py
- audit-jlcpcb-stock.mjs
- audit-kelvin-connections.py
- audit-manufacturing.py
- build-dual.tsx
- capture-encoder-routing.tsx
- capture-imported-via-routing.tsx
- capture-pd-routing.tsx
- check-built.ts
- check-clock-pcb-placement.tsx
- check-dual.ts
- copper_geometry.py
- dev.ts
- expand-feedback-routes.ts
- expand-revision-routes.ts
- export-assembly.py
- export-dual.ts
- export-freerouting.py
- freerouting_geometry.py
- gerber_geometry.py
- import-freerouting.py
- normalize-route-widths.py
- prepare-dual-routing.py
- reconstruct-repair-graph.py
- refresh-routing-terminals.tsx
- render-driver-thermal-vias.py
- render-pcb.ts
- render-placement.tsx
- render-revision-pcb.ts
- render-route-plan.tsx
- render-schematic.tsx
- repair-missing-routes.py
- repro-orientation-metadata.tsx
- reroute-feedback.tsx
- reroute-revision.tsx
- resume-freerouting.py
- route-local.py
- route-metrics.ts
- RouteBoard.java
- save-ground-pour-selection.py
- simplify-route-plan.py
- snap-fixed-route-vertices.py
- snapshot-auto-layout.ts
- snapshot-clock.ts
- validate-build.ts
- widen-power-routes.py