seveibar/am3352-ram-dogbone-and-single-layer-route-test

AM3352BZCZ100 processor connected to a W631GG6MB-12 DDR3 memory chip through a routed, length-matched 16-bit DDR interface with clock/data-strobe pairs and control/address signals.

Version: 0.0.9
License: unset
Stars: 0

validation/safe-candidate/copper-audit.json

{
  "circuitSha256": "5c8bf16b526d70111038e5dab1e7c138991b94beda3971f34f9f31c650a9c6db",
  "audit": "Physical pad/trace/via/pour geometry; 1 um connectivity tolerance, 3 um clearance tolerance",
  "nets": 47,
  "incompleteNets": {},
  "clearanceViolations": [],
  "copperGeometryItems": 6366
}