pixalynx/cm5-minimal-carrier

output/validation.json

{
  "plane": {
    "groundPlaneIslands": 1,
    "samples": 6954,
    "stepMm": 0.05,
    "sampleMethod": "trace centre and both edges projected onto filled L2 GND",
    "uncoveredSamples": [],
    "powerPlaneIslands": 1
  },
  "status": "DESIGN CHECKS PASS / FABRICATION RELEASE PENDING",
  "checks": [
    "200 pin assignments verified from current official CM5 table 4",
    "Official PDF extraction matches all 200 names",
    "Two distinct 100-contact footprints; 34 mm centre spacing",
    "All CM5 ground pins and all six 5 V pins connected",
    "Mandatory GPIO_VREF supplied by CM5 3.3 V; control defaults are NC",
    "CM5 internal PD is wired directly to separate CC contacts, with no external Rd",
    "All four physical VBUS and GND contacts join their shared GCT lands",
    "HDMI0 TMDS polarity, clock, CEC, HPD, SCL and SDA match official pinout",
    "TVS cathode faces VBUS and HDMI output uses reference current-limit switch",
    "ESD NC land pairs are not declared internally connected; copper bridges every channel",
    "All four HDMI pairs: skew <= 0.15 mm; total inter-pair difference <= 25 mm; zero vias",
    "tsCircuit emitted no errors",
    "All 15 placed components have 3D body models with usable materials",
    "CM5 3D module is aligned over the sockets at 1.5 mm mating height",
    "Six bare probe pads connect only to power/ground and have no paste or component bodies",
    "Every intended source pin maps to the correct emitted connectivity net",
    "Emitted diode polarity identifies pin 1 as cathode",
    "Independent KiCad DRC: zero violations and zero unconnected items",
    "Filled L2 plane is connected and covers every HDMI trace centre/edge sample",
    "Official CM5 PDF snapshot hash matches extraction record",
    "Manufacturing audit hashes match the current circuit, board, DRC and CAM files"
  ],
  "hdmiPairs": [
    {
      "lane": "TX2",
      "p": 13.47008863117638,
      "n": 13.47008863117638,
      "skew": 0
    },
    {
      "lane": "TX1",
      "p": 13.594352699888306,
      "n": 13.594352699888306,
      "skew": 0
    },
    {
      "lane": "TX0",
      "p": 13.718616768600237,
      "n": 13.718616768600237,
      "skew": 0
    },
    {
      "lane": "CLK",
      "p": 13.842880837312164,
      "n": 13.842880837312164,
      "skew": 0
    }
  ],
  "tscircuitWarnings": [
    {
      "type": "source_no_power_pin_defined_warning",
      "source_no_power_pin_defined_warning_id": "source_no_power_pin_defined_warning_0",
      "warning_type": "source_no_power_pin_defined_warning",
      "message": "U2 has no pin with requires_power=true",
      "source_component_id": "source_component_5",
      "source_port_ids": [
        "source_port_242",
        "source_port_243",
        "source_port_244",
        "source_port_245",
        "source_port_246",
        "source_port_247",
        "source_port_248",
        "source_port_249",
        "source_port_250",
        "source_port_251"
      ],
      "subcircuit_id": "subcircuit_source_group_0"
    },
    {
      "type": "source_no_power_pin_defined_warning",
      "source_no_power_pin_defined_warning_id": "source_no_power_pin_defined_warning_1",
      "warning_type": "source_no_power_pin_defined_warning",
      "message": "U3 has no pin with requires_power=true",
      "source_component_id": "source_component_6",
      "source_port_ids": [
        "source_port_252",
        "source_port_253",
        "source_port_254",
        "source_port_255",
        "source_port_256",
        "source_port_257",
        "source_port_258",
        "source_port_259",
        "source_port_260",
        "source_port_261"
      ],
      "subcircuit_id": "subcircuit_source_group_0"
    },
    {
      "type": "source_no_power_pin_defined_warning",
      "source_no_power_pin_defined_warning_id": "source_no_power_pin_defined_warning_2",
      "warning_type": "source_no_power_pin_defined_warning",
      "message": "U4 has no pin with requires_power=true",
      "source_component_id": "source_component_7",
      "source_port_ids": [
        "source_port_262",
        "source_port_263",
        "source_port_264",
        "source_port_265",
        "source_port_266",
        "source_port_267",
        "source_port_268",
        "source_port_269",
        "source_port_270",
        "source_port_271"
      ],
      "subcircuit_id": "subcircuit_source_group_0"
    }
  ],
  "kicad": {
    "violations": 0,
    "unconnected": 0
  },
  "remaining": [
    "JLC controlled impedance approval",
    "Assembly rotation and sourcing review",
    "USB-C PD/inrush/load bench validation",
    "Connector current/temperature qualification",
    "HDMI and thermal prototype validation"
  ]
}