pixalynx/cm5-minimal-carrier

A 4-layer Raspberry Pi CM5 carrier board routes USB‑C 5V power through an RT9742 load switch with TVS protection and capacitive filtering, while providing ESD-protected HDMI output, CM5 connectors, test points, and ground/power planes.

Version
0.1.1
License
unset
Stars
0

output/manufacturing-audit.json

{
  "status": "CAM CONSISTENCY CHECKS PASS / MANUFACTURER RELEASE PENDING",
  "checks": [
    "Gerber outline uses the CPL origin: (0,0) to (64,60) mm",
    "KiCad drill/place origin is the bottom-left physical board corner",
    "Every emitted SMT pad appears at the same coordinates in copper and solder mask; only fitted parts receive paste",
    "CPL and BOM contain exactly the 15 fitted references, excluding probe pads",
    "CPL coordinates share the Gerber origin and preserve declared layers/rotations (library registration still requires approval)",
    "All plated via drills retain their coordinates and 0.2 mm diameter",
    "All NPTH holes retain their coordinates and diameters",
    "Eight connector stakes remain plated routed slots with correct centres, widths and lengths",
    "Every via is through-hole and explicitly tented on both surfaces",
    "No via-centre mask openings are present in final mask Gerbers",
    "Nominal solder-mask webs are at least 0.10 mm for green 1 oz fabrication",
    "IPC-D-356 declares its 0.0001 inch coordinate unit",
    "Electrical-test netlist locates each power/ground probe pad on its intended net in the same origin",
    "Final independent DRC is clean with no exclusions"
  ],
  "originMm": [
    0,
    0
  ],
  "boardSizeMm": [
    64,
    60
  ],
  "viaCount": 114,
  "platedSlots": 8,
  "nonPlatedHoles": 6,
  "minimumNominalMaskWebMm": 0.14,
  "minimumMaskWebBetween": [
    "J1.1",
    "J1.3"
  ],
  "ipcCoordinateUnitMm": 0.00254,
  "sha256": {
    "dist/index/circuit.json": "63e6ce29691cf3c677d36d1a9837d74f5c5e60e24474d243f10055e9db7761f3",
    "output/cm5-minimal.kicad_pcb": "b73ea9c03c4cdaf7c5edcb30c249200e80ba514c8fb73c03c54dab8d9b644435",
    "output/cm5-minimal.kicad_pro": "29168e76c93081f2729ccd427bd48b467c32dd7fa7bda5ab7696304795f90dbf",
    "output/drc.json": "367a6c86a3ac7c99a75fd8885240870f83a8ad19b0b080713df663b4d9172575",
    "output/cm5-minimal.ipc": "e8b5f34ca22087826cc0cef3e5c4de90c035500c5bd35b3f182490ce1ca5307a",
    "output/jlcpcb-bom.csv": "5ccb1857be0e2c6cb38a8d7a386a4ee3beafce4e6d6b1fc16b050d5d322932a0",
    "output/jlcpcb-cpl-REVIEW.csv": "97ae956a20e7cf5936654140739490208e144f5389f1a7c31bd2f28c2864c4f9",
    "output/fabrication-REVIEW/cm5-minimal-B_Cu.gbl": "1ffb3cb2d854f121476977af685de1fc29691d4edb9885d73cd1102d26424d66",
    "output/fabrication-REVIEW/cm5-minimal-B_Mask.gbs": "c00d8b728ba90ab4a7968e1f9a3b48861bf220666c702be5c49e536d295ea04e",
    "output/fabrication-REVIEW/cm5-minimal-B_Paste.gbp": "533331d869f88734cdf85f529a2fea19943480fe3947e179947da97a9ce10a09",
    "output/fabrication-REVIEW/cm5-minimal-B_Silkscreen.gbo": "e650c111a721963a1b10d4db1b58b061beeace38add3d67c94137227630823ed",
    "output/fabrication-REVIEW/cm5-minimal-Edge_Cuts.gm1": "c87b4c55fe67d9c537439dbcc20051db053462fba44488dbd0a36273ff246c65",
    "output/fabrication-REVIEW/cm5-minimal-F_Cu.gtl": "6d3e5d05a58aa3801ed14566b18a49913996421fd6269fcc1b5b0f9e1c461a03",
    "output/fabrication-REVIEW/cm5-minimal-F_Mask.gts": "b203f3ebef4ae4a9efab253aa9983e028119bf2d3ad16446c78764e4a66830eb",
    "output/fabrication-REVIEW/cm5-minimal-F_Paste.gtp": "13733daff118883c7ec6e1dd2f8156774acc0e74ebb7e25e2ed4ee041cf83b82",
    "output/fabrication-REVIEW/cm5-minimal-F_Silkscreen.gto": "4f1af995b9ef134ed257c2d919c05a63a937fdccb367d327f2eed0c2abc39340",
    "output/fabrication-REVIEW/cm5-minimal-In1_Cu.g1": "17d023d5b4fd01b9d53cc399d7cdb9988c2e4338d6fe88efdfd3394a1004868b",
    "output/fabrication-REVIEW/cm5-minimal-In2_Cu.g2": "3122ed12d2fb8bd65647e9e0fac07efa863af18490d59acce1da0001ded735c1",
    "output/fabrication-REVIEW/cm5-minimal-job.gbrjob": "30a640a3fc76bd54a6d44927d7c92f63361dc0483ecfd71aa5e0be940257b600",
    "output/fabrication-REVIEW/cm5-minimal-NPTH.drl": "0af9a3011112e440a652577856f00cd09d1d9efbd56334b2f2ee73f09949b99d",
    "output/fabrication-REVIEW/cm5-minimal-PTH.drl": "cf0be6c9991aa7b3c0ad045aa5dd9a72a1a16aedd49ed8081bdede969113112e"
  },
  "notVerified": [
    "JLC placement-library registration/centroids",
    "Order-specific stack-up and impedance coupon approval",
    "CAM edits or process qualification at manufacturer",
    "Physical power, HDMI and thermal performance"
  ]
}