pixalynx/cm5-minimal-carrier

docs/sources.md

# Source record

Reviewed 18 September 2026. Official Raspberry Pi documents are the primary reference; no CM4 pinout is used. Document content and manufacturer specifications take precedence over distributor search snippets. Supplier identities are checked; stock and JLC assembly availability must be refreshed at order time.

| Primary source | Design use |
|---|---|
| [CM5 datasheet, current Release 3 / 8 June 2026](https://datasheets.raspberrypi.com/cm5/cm5-datasheet.pdf) | All 200 Table 4 pins, power sequencing, internal PD CC pins, mandatory GPIO_VREF, HDMI routing limits, module mechanics, SKU selection |
| [CM5 IO Board datasheet](https://datasheets.raspberrypi.com/cm5/cm5io-datasheet.pdf) | Reference architecture and current-limited HDMI +5 V |
| [Official CM5IO revision 2 design download](https://pip.raspberrypi.com/categories/1098-design-files) | CM5 footprint/connector spacing, USB4105 and EDAC HDMI land/drill geometry, RT9742SNGV HDMI switch pinout and implementation |
| [Raspberry Pi Compute Module hardware documentation](https://www.raspberrypi.com/documentation/computers/compute-module.html) | 5 V / 5 A and 5 V / 3 A USB-C support, boot/programming context |
| [Amphenol BergStak 0.40 mm datasheet](https://cdn.amphenol-cs.com/media/wysiwyg/files/documentation/datasheet/boardwiretoboard/bwb_bergstak_0_40mm_btb.pdf) | Part family, stacking option and all-contacts-powered current rating |
| [GCT USB4105 specification](https://gct.co/files/specs/usb4105-spec.pdf) | Aggregate 5 A VBUS rating; pin allocation |
| [Richtek RT9742 datasheet](https://www.richtek.com/assets/product_file/RT9742/DS9742-10.pdf) | SNGV three-pin VIN/VOUT/GND mapping, 0.5 A version and protection behaviour |
| [TI TPD4E05U06 datasheet](https://www.ti.com/lit/ds/symlink/tpd4e05u06.pdf) | DQA pin mapping, NC land behaviour, 0.5 pF channels, HDMI application and recommended land pattern |
| [Diodes Incorporated SMAJ series](https://www.diodes.com/assets/Datasheets/ds19002.pdf) | VBUS transient suppression device; standoff versus clamp distinction |
| [JLCPCB controlled impedance stack-ups](https://jlcpcb.com/impedance) | JLC04161H-3313 laminate and copper dimensions |

The PDF snapshots and original CM5IO KiCad board are stored in `references/`; hashes are in `output/reference-sha256.json`. The original full IO schematic and its CM5 GPIO/high-speed sheets are included for traceability. Their unrelated peripherals are not incorporated in this design.

## Supplier identities

- [Amphenol sockets C6782225](https://www.lcsc.com/product-detail/C6782225.html)
- [GCT USB-C C3020560](https://www.lcsc.com/product-detail/C3020560.html)
- [EDAC HDMI C5291558](https://www.lcsc.com/product-detail/C5291558.html)
- [Richtek switch C3235509](https://www.lcsc.com/product-detail/C3235509.html)
- [TI ESD array C138714](https://www.lcsc.com/product-detail/C138714.html)
- [Diodes SMAJ5.0A-13-F C87074](https://www.lcsc.com/product-detail/C87074.html)
- [Samsung 10 µF C15850](https://www.lcsc.com/product-detail/C15850.html)
- [Samsung 1 µF C28323](https://www.lcsc.com/product-detail/C28323.html)
- [Samsung 100 nF C1525](https://www.lcsc.com/product-detail/C1525.html)
- [Murata 47 µF C426659](https://www.lcsc.com/product-detail/C426659.html)

A search also returns non-TI products with the same TPD4E05U06DQAR text, such as C2827646. Those are **not** approved substitutes for the TI part selected here.

## Geometry and licensing

CM5, USB-C, HDMI and the reference switch geometry originate from Raspberry Pi's CM5IO files. The two socket footprints are extracted by translating the original combined module footprint, without rotating or mirroring contact numbering. Connector slots are retained as plated slots; USB locating pegs and module screw holes remain nonplated. Top-view coordinates are converted from KiCad's downward Y to tsCircuit's upward Y.

Passive/SMA geometry comes from the installed KiCad footprint library under its supplied licence; see `references/KICAD-LICENSE.md`. The TI DQA footprint is created from its published recommended land pattern (0.835 mm row spacing, 0.5 mm pitch, 0.565 × 0.2 mm signal pads, 0.4 mm ground pad height). Manufacturer documents and original models retain their respective licences. No custom design ownership claim is made over those reference assets.

## Revision B comparison and manufacturing sources

- [CM5 MINIMA REV2, pinned commit e9dbac2](https://github.com/piecol/CM5_MINIMA_REV2/tree/e9dbac2df2d8a7606cb91eae80b1b3b740250910): secondary connectivity and test-access comparison; local checkout retains CERN-OHL-S-2.0. See `references/minima-comparison.json` for source hashes and extracted facts.
- [MINIMA HDMI restart report](https://github.com/piecol/CM5_MINIMA_REV2/issues/2): unresolved reported scenario added to bring-up tests; no root cause assumed.
- [JLC calculator](https://jlcpcb.com/pcb-impedance-calculator): live result recorded 18 September 2026 in `lib/stackup.json`.
- [JLC CPL specification](https://jlcpcb.com/help/article/pick-place-file-for-pcb-assembly): units, centroid, side and rotation fields.
- [JLC PCB capabilities](https://jlcpcb.com/capabilities/Capab): multilayer trace/space, mask web and silk requirements.
- [JLC assembly FAQ](https://jlcpcb.com/help/article/pcb-assembly-faqs): fiducial provision and assembly process review.
- [KiCad 10 CLI documentation](https://docs.kicad.org/10.0/en/cli/cli.html): shared drill/place-origin flags and IPC-D-356 export.