mohan-bee/fitness-band

validation/publish-native-main-build.log

Building 1 file(s)...
Building index.circuit.tsx...
Generating circuit JSON...
Could not save autorouting paths for subcircuit_source_group_0: Only port-anchored wire/via routes can be saved
Circuit JSON written to dist/index/circuit.json
The "J" prefix is being used with a <chip />, try using it with a <connector /> or <jumper />
The "J" prefix is being used with a <chip />, try using it with a <connector /> or <jumper />
The "J" prefix is being used with a <chip />, try using it with a <connector /> or <jumper />
The "J" prefix is being used with a <chip />, try using it with a <connector /> or <jumper />
<trace#1299(from:.R7 > .pin1 to:.U2 > .PROG1) /> is missing a name. Add a name prop to make the trace easier to identify.
<trace#1301(from:.R8 > .pin1 to:.U2 > .PROG3) /> is missing a name. Add a name prop to make the trace easier to identify.
Port VBUS on U1 is missing a trace
J_SWD has no pin with requires_power=true
J_SWD has no pin with requires_ground=true
All pins on J_SWD are underspecified (no pinAttributes set)
U2 has no pin with requires_power=true
U2 has no pin with requires_ground=true
All pins on U2 are underspecified (no pinAttributes set)
J_BAT has no pin with requires_power=true
J_BAT has no pin with requires_ground=true
All pins on J_BAT are underspecified (no pinAttributes set)
J_CHG has no pin with requires_power=true
J_CHG has no pin with requires_ground=true
All pins on J_CHG are underspecified (no pinAttributes set)
D1 has no pin with requires_power=true
D1 has no pin with requires_ground=true
All pins on D1 are underspecified (no pinAttributes set)
D2 has no pin with requires_power=true
D2 has no pin with requires_ground=true
All pins on D2 are underspecified (no pinAttributes set)
U6 has no pin with requires_power=true
J_FLEX has no pin with requires_power=true
J_FLEX has no pin with requires_ground=true
All pins on J_FLEX are underspecified (no pinAttributes set)
No <schematicsheet> was found. Add a <schematicsheet> to define the schematic drawing area.
J_FLEX has no courtyard

Build complete
  Circuits  1 passed
  Output    dist

✓ Done
Build exiting with code 0: build finished successfully