mohan-bee/fitness-band

validation/main-netlist.log

Each child in a list should have a unique "key" prop.

Check the render method of `MainBoard`. It was passed a child from FlexConnections. See https://react.dev/link/warning-keys for more information.
Each child in a list should have a unique "key" prop.

Check the render method of `MainBoard`. See https://react.dev/link/warning-keys for more information.
Errors: 0
Warnings: 0

Readable Netlist:
COMPONENTS:
 - U1: MDBT50Q-1MV2
 - J_SWD: 6-pad pogo fixture
 - U2: BQ25180YBGR
 - U3: TPS63031DSKR
 - L1: L1, source_component
 - J_BAT: Protected LiPo + pack NTC pads
 - J_CHG: Recessed 5V dock contacts
 - U4: BMA400
 - U5: MAX17048G+T10
 - U6: TLV70018DDCR
 - J_FLEX: 
 - C1: 4.7uF capacitor
 - C2: 100nF capacitor
 - C3: 1uF capacitor
 - C4: 1uF capacitor
 - C5: 10uF capacitor
 - C6: 10uF capacitor
 - C7: 10uF capacitor
 - C8: 10uF capacitor
 - C9: 100nF capacitor
 - C10: 100nF capacitor
 - C11: 100nF capacitor
 - C12: 1uF capacitor
 - C13: 1uF capacitor
 - R1: 10kΩ resistor
 - R2: 10kΩ resistor
 - R3: 4.7kΩ resistor
 - R4: 4.7kΩ resistor
 - R5: 4.7kΩ resistor

NET: SWDIO
  - J_SWD SWDIO
  - U1 SWDIO

NET: SWDCLK
  - J_SWD SWDCLK
  - U1 SWDCLK

NET: RESET
  - J_SWD RESET
  - U1 P0_18

NET: SW1
  - L1 pin1 (+)
  - U3 L1

NET: SW2
  - L1 pin2 (-)
  - U3 L2

NET: BAT_NTC
  - J_BAT NTC
  - U2 TS

NET: MOTION_INT
  - U4 INT1
  - U1 P0_12

NET: CHG_5V
  - C3 pin1 (+)
  - J_CHG POS (+)
  - U2 IN

NET: VSYS
  - C6 pin1 (+)
  - C5 pin1 (+)
  - U3 EN
  - U3 VINA
  - U3 VIN
  - U2 SYS

NET: VBAT
  - C11 pin1 (+)
  - C4 pin1 (+)
  - U5 CELL
  - U5 VDD
  - J_BAT BAT
  - U2 BAT

NET: V1V8
  - C13 pin1 (+)
  - J_FLEX V1V8
  - U6 OUT

NET: GND
  - C13 pin2 (-)
  - C12 pin2 (-)
  - C11 pin2 (-)
  - C10 pin2 (-)
  - C9 pin2 (-)
  - C8 pin2 (-)
  - C7 pin2 (-)
  - C6 pin2 (-)
  - C5 pin2 (-)
  - C4 pin2 (-)
  - C3 pin2 (-)
  - C2 pin2 (-)
  - C1 pin2 (-)
  - J_FLEX GND8
  - J_FLEX GND3
  - J_FLEX GND1
  - U6 GND
  - U5 QSTRT
  - U5 EP
  - U5 GND
  - U5 CTG
  - U4 SDO
  - U4 GNDIO
  - U4 GND
  - J_CHG GND
  - J_BAT GND
  - U3 PS
  - U3 EP
  - U3 PGND
  - U3 GND
  - U2 GND
  - J_SWD GND2
  - J_SWD GND
  - U1 GND5
  - U1 GND4
  - U1 GND3
  - U1 GND2
  - U1 GND1

NET: CHG_INT
  - R1 pin2
  - U2 INT
  - U1 P0_13

NET: FG_INT
  - R2 pin2
  - U5 N_ALRT
  - U1 P0_14

NET: SCL
  - R3 pin2
  - J_FLEX SCL
  - U5 SCL
  - U4 SCX
  - U2 SCL
  - U1 P0_27

NET: SDA
  - R4 pin2
  - J_FLEX SDA
  - U5 SDA
  - U4 SDX
  - U2 SDA
  - U1 P0_26

NET: V3V3
  - R5 pin1
  - R4 pin1
  - R3 pin1
  - R2 pin1
  - R1 pin1
  - C12 pin1 (+)
  - C10 pin1 (+)
  - C9 pin1 (+)
  - C8 pin1 (+)
  - C7 pin1 (+)
  - C2 pin1 (+)
  - C1 pin1 (+)
  - J_FLEX V3V3
  - U6 EN
  - U6 IN
  - U4 CSB
  - U4 VDDIO
  - U4 VDD
  - U3 FB
  - U3 VOUT
  - J_SWD VTREF
  - U1 VDDH
  - U1 VDD

NET: PPG_INT
  - R5 pin2
  - J_FLEX PPG_INT
  - U1 P0_11


COMPONENT_PINS:
U1 (MDBT50Q-1MV2)
- pin1(GND1): NETS(GND)
- pin2(GND2): NETS(GND)
- pin3(P1_10): NOT_CONNECTED
- pin4(P1_11): NOT_CONNECTED
- pin5(P1_12): NOT_CONNECTED
- pin6(P1_13): NOT_CONNECTED
- pin7(P1_14): NOT_CONNECTED
- pin8(P1_15): NOT_CONNECTED
- pin9(P0_03, AIN1): NOT_CONNECTED
- pin10(P0_29, AIN5): NOT_CONNECTED
- pin11(P0_02, AIN0): NOT_CONNECTED
- pin12(P0_31, AIN7): NOT_CONNECTED
- pin13(P0_28, AIN4): NOT_CONNECTED
- pin14(P0_30, AIN6): NOT_CONNECTED
- pin15(GND3): NETS(GND)
- pin16(P0_27): NETS(SCL)
- pin17(P0_00, XL1): NOT_CONNECTED
- pin18(P0_01, XL2): NOT_CONNECTED
- pin19(P0_26): NETS(SDA)
- pin20(P0_04, AIN2): NOT_CONNECTED
- pin21(P0_05, AIN3): NOT_CONNECTED
- pin22(P0_06): NOT_CONNECTED
- pin23(P0_07, TRACECLK): NOT_CONNECTED
- pin24(P0_08): NOT_CONNECTED
- pin25(P1_08): NOT_CONNECTED
- pin26(P1_09, TRACEDATA3): NOT_CONNECTED
- pin27(P0_11, TRACEDATA2): NETS(PPG_INT)
- pin28(VDD): NETS(V3V3)
- pin29(P0_12, TRACEDATA1): NETS(MOTION_INT)
- pin30(VDDH): NETS(V3V3)
- pin31(DCCH): NOT_CONNECTED
- pin32(VBUS): NOT_CONNECTED
- pin33(GND4): NETS(GND)
- pin34(D_NEG): NOT_CONNECTED
- pin35(D_POS): NOT_CONNECTED
- pin36(P0_14): NETS(FG_INT)
- pin37(P0_13): NETS(CHG_INT)
- pin38(P0_16): NOT_CONNECTED
- pin39(P0_15): NOT_CONNECTED
- pin40(P0_18, nRESET): NETS(RESET)
- pin41(P0_17): NOT_CONNECTED
- pin42(P0_19): NOT_CONNECTED
- pin43(P0_21): NOT_CONNECTED
- pin44(P0_20): NOT_CONNECTED
- pin45(P0_23): NOT_CONNECTED
- pin46(P0_22): NOT_CONNECTED
- pin47(P1_00, TRACEDATA0): NOT_CONNECTED
- pin48(P0_24): NOT_CONNECTED
- pin49(P0_25): NOT_CONNECTED
- pin50(P1_02): NOT_CONNECTED
- pin51(SWDIO): NETS(SWDIO)
- pin52(P0_09, NFC1): NOT_CONNECTED
- pin53(SWDCLK): NETS(SWDCLK)
- pin54(P0_10, NFC2): NOT_CONNECTED
- pin55(GND5): NETS(GND)
- pin56(P1_04): NOT_CONNECTED
- pin57(P1_06): NOT_CONNECTED
- pin58(P1_07): NOT_CONNECTED
- pin59(P1_05): NOT_CONNECTED
- pin60(P1_03): NOT_CONNECTED
- pin61(P1_01): NOT_CONNECTED

J_SWD (6-pad pogo fixture)
- pin1(VTREF): NETS(V3V3)
- pin2(SWDIO): NETS(SWDIO)
- pin3(GND): NETS(GND)
- pin4(SWDCLK): NETS(SWDCLK)
- pin5(RESET): NETS(RESET)
- pin6(GND2): NETS(GND)

U2 (BQ25180YBGR)
- pin1(GND, D2): NETS(GND)
- pin2(TS, MR, D1): NETS(BAT_NTC)
- pin3(SDA, C1): NETS(SDA)
- pin4(BAT, C2): NETS(VBAT)
- pin5(SYS, B2): NETS(VSYS)
- pin6(SCL, B1): NETS(SCL)
- pin7(INT, A1): NETS(CHG_INT)
- pin8(IN, A2): NETS(CHG_5V)

U3 (TPS63031DSKR)
- pin1(VOUT): NETS(V3V3)
- pin2(L2): NETS(SW2)
- pin3(PGND): NETS(GND)
- pin4(L1): NETS(SW1)
- pin5(VIN): NETS(VSYS)
- pin6(EN): NETS(VSYS)
- pin7(PS, SYNC): NETS(GND)
- pin8(VINA): NETS(VSYS)
- pin9(GND): NETS(GND)
- pin10(FB): NETS(V3V3)
- pin11(EP): NETS(GND)

L1 (VLS201612ET-2R2M)
- pin1(anode, pos, left): NETS(SW1)
- pin2(cathode, neg, right): NETS(SW2)

J_BAT (Protected LiPo + pack NTC pads)
- pin1(BAT): NETS(VBAT)
- pin2(GND): NETS(GND)
- pin3(NTC): NETS(BAT_NTC)

J_CHG (Recessed 5V dock contacts)
- pin1(POS): NETS(CHG_5V)
- pin2(GND): NETS(GND)

U4 (BMA400)
- pin1(SDO): NETS(GND)
- pin2(SDX): NETS(SDA)
- pin3(VDDIO): NETS(V3V3)
- pin4(NC2): NOT_CONNECTED
- pin5(INT1): NETS(MOTION_INT)
- pin6(INT2): NOT_CONNECTED
- pin7(VDD): NETS(V3V3)
- pin8(GNDIO): NETS(GND)
- pin9(GND): NETS(GND)
- pin10(CSB): NETS(V3V3)
- pin11(NC1): NOT_CONNECTED
- pin12(SCX): NETS(SCL)

U5 (MAX17048G+T10)
- pin1(CTG): NETS(GND)
- pin2(CELL): NETS(VBAT)
- pin3(VDD): NETS(VBAT)
- pin4(GND): NETS(GND)
- pin5(N_ALRT): NETS(FG_INT)
- pin6(QSTRT): NETS(GND)
- pin7(SCL): NETS(SCL)
- pin8(SDA): NETS(SDA)
- pin9(EP): NETS(GND)

U6 (TLV70018DDCR)
- pin1(IN): NETS(V3V3)
- pin2(GND): NETS(GND)
- pin3(EN): NETS(V3V3)
- pin4(NC): NOT_CONNECTED
- pin5(OUT): NETS(V1V8)

J_FLEX
- pin1(GND1): NETS(GND)
- pin2(V3V3): NETS(V3V3)
- pin3(GND3): NETS(GND)
- pin4(SCL): NETS(SCL)
- pin5(SDA): NETS(SDA)
- pin6(PPG_INT): NETS(PPG_INT)
- pin7(V1V8): NETS(V1V8)
- pin8(GND8): NETS(GND)

C1 (4.7uF undefined)
- pin1(anode, pos, left): NETS(V3V3)
- pin2(cathode, neg, right): NETS(GND)

C2 (100nF undefined)
- pin1(anode, pos, left): NETS(V3V3)
- pin2(cathode, neg, right): NETS(GND)

C3 (1uF undefined)
- pin1(anode, pos, left): NETS(CHG_5V)
- pin2(cathode, neg, right): NETS(GND)

C4 (1uF undefined)
- pin1(anode, pos, left): NETS(VBAT)
- pin2(cathode, neg, right): NETS(GND)

C5 (10uF undefined)
- pin1(anode, pos, left): NETS(VSYS)
- pin2(cathode, neg, right): NETS(GND)

C6 (10uF undefined)
- pin1(anode, pos, left): NETS(VSYS)
- pin2(cathode, neg, right): NETS(GND)

C7 (10uF undefined)
- pin1(anode, pos, left): NETS(V3V3)
- pin2(cathode, neg, right): NETS(GND)

C8 (10uF undefined)
- pin1(anode, pos, left): NETS(V3V3)
- pin2(cathode, neg, right): NETS(GND)

C9 (100nF undefined)
- pin1(anode, pos, left): NETS(V3V3)
- pin2(cathode, neg, right): NETS(GND)

C10 (100nF undefined)
- pin1(anode, pos, left): NETS(V3V3)
- pin2(cathode, neg, right): NETS(GND)

C11 (100nF undefined)
- pin1(anode, pos, left): NETS(VBAT)
- pin2(cathode, neg, right): NETS(GND)

C12 (1uF undefined)
- pin1(anode, pos, left): NETS(V3V3)
- pin2(cathode, neg, right): NETS(GND)

C13 (1uF undefined)
- pin1(anode, pos, left): NETS(V1V8)
- pin2(cathode, neg, right): NETS(GND)

R1 (10kΩ undefined)
- pin1(anode, pos, left): NETS(V3V3)
- pin2(cathode, neg, right): NETS(CHG_INT)

R2 (10kΩ undefined)
- pin1(anode, pos, left): NETS(V3V3)
- pin2(cathode, neg, right): NETS(FG_INT)

R3 (4.7kΩ undefined)
- pin1(anode, pos, left): NETS(V3V3)
- pin2(cathode, neg, right): NETS(SCL)

R4 (4.7kΩ undefined)
- pin1(anode, pos, left): NETS(V3V3)
- pin2(cathode, neg, right): NETS(SDA)

R5 (4.7kΩ undefined)
- pin1(anode, pos, left): NETS(V3V3)
- pin2(cathode, neg, right): NETS(PPG_INT)