mohan-bee/fitness-band
A 4-layer BLE wearable mainboard with Li-ion charging/protection, 3.3/1.8 V power regulation, motion and battery sensing, plus a folded 2-layer flex sensor board carrying MAX30102 optical and TMP117 temperature sensors.
- Version
- 0.0.2
- License
- unset
- Stars
- 0
dist/sensor-flex/circuit.json
PCB
Schematic
[
{
"type": "source_group",
"source_group_id": "source_group_0",
"is_subcircuit": true,
"was_automatically_named": true,
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_net",
"source_net_id": "source_net_0",
"name": "GND",
"member_source_group_ids": [],
"is_ground": true,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_net",
"source_net_id": "source_net_1",
"name": "V3V3",
"member_source_group_ids": [],
"is_ground": false,
"is_power": true,
"trace_width": 0.15,
"is_positive_voltage_source": true,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_net",
"source_net_id": "source_net_2",
"name": "V1V8",
"member_source_group_ids": [],
"is_ground": false,
"is_power": true,
"trace_width": 0.15,
"is_positive_voltage_source": true,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_port",
"source_port_id": "source_port_0",
"name": "GND1",
"pin_number": 1,
"port_hints": [
"GND1",
"pin1",
"1"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_port",
"source_port_id": "source_port_1",
"name": "V3V3",
"pin_number": 2,
"port_hints": [
"V3V3",
"pin2",
"2"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_port",
"source_port_id": "source_port_2",
"name": "GND3",
"pin_number": 3,
"port_hints": [
"GND3",
"pin3",
"3"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_port",
"source_port_id": "source_port_3",
"name": "SCL",
"pin_number": 4,
"port_hints": [
"SCL",
"pin4",
"4"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_port",
"source_port_id": "source_port_4",
"name": "SDA",
"pin_number": 5,
"port_hints": [
"SDA",
"pin5",
"5"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_port",
"source_port_id": "source_port_5",
"name": "PPG_INT",
"pin_number": 6,
"port_hints": [
"PPG_INT",
"pin6",
"6"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_port",
"source_port_id": "source_port_6",
"name": "V1V8",
"pin_number": 7,
"port_hints": [
"V1V8",
"pin7",
"7"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_port",
"source_port_id": "source_port_7",
"name": "GND8",
"pin_number": 8,
"port_hints": [
"GND8",
"pin8",
"8"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_component",
"source_component_id": "source_component_0",
"ftype": "simple_chip",
"name": "J_TAIL",
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_8",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"1"
],
"source_component_id": "source_component_1",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_component",
"source_component_id": "source_component_1",
"ftype": "simple_test_point",
"name": "TP1",
"footprint_variant": "through_hole",
"pad_shape": "circle",
"pad_diameter": 0.6,
"hole_diameter": 0.5,
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_9",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"1"
],
"source_component_id": "source_component_2",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_component",
"source_component_id": "source_component_2",
"ftype": "simple_test_point",
"name": "TP2",
"footprint_variant": "through_hole",
"pad_shape": "circle",
"pad_diameter": 0.6,
"hole_diameter": 0.5,
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_10",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"1"
],
"source_component_id": "source_component_3",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_component",
"source_component_id": "source_component_3",
"ftype": "simple_test_point",
"name": "TP3",
"footprint_variant": "through_hole",
"pad_shape": "circle",
"pad_diameter": 0.6,
"hole_diameter": 0.5,
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_11",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"1"
],
"source_component_id": "source_component_4",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_component",
"source_component_id": "source_component_4",
"ftype": "simple_test_point",
"name": "TP4",
"footprint_variant": "through_hole",
"pad_shape": "circle",
"pad_diameter": 0.6,
"hole_diameter": 0.5,
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_12",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"1"
],
"source_component_id": "source_component_5",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_component",
"source_component_id": "source_component_5",
"ftype": "simple_test_point",
"name": "TP5",
"footprint_variant": "through_hole",
"pad_shape": "circle",
"pad_diameter": 0.6,
"hole_diameter": 0.5,
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_13",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"1"
],
"source_component_id": "source_component_6",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_component",
"source_component_id": "source_component_6",
"ftype": "simple_test_point",
"name": "TP6",
"footprint_variant": "through_hole",
"pad_shape": "circle",
"pad_diameter": 0.6,
"hole_diameter": 0.5,
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_14",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"1"
],
"source_component_id": "source_component_7",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_component",
"source_component_id": "source_component_7",
"ftype": "simple_test_point",
"name": "TP7",
"footprint_variant": "through_hole",
"pad_shape": "circle",
"pad_diameter": 0.6,
"hole_diameter": 0.5,
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_15",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"1"
],
"source_component_id": "source_component_8",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_component",
"source_component_id": "source_component_8",
"ftype": "simple_test_point",
"name": "TP8",
"footprint_variant": "through_hole",
"pad_shape": "circle",
"pad_diameter": 0.6,
"hole_diameter": 0.5,
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_16",
"name": "N_C_4",
"pin_number": 1,
"port_hints": [
"N_C_4",
"pin1",
"1"
],
"source_component_id": "source_component_9",
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_17",
"name": "SCL",
"pin_number": 2,
"port_hints": [
"SCL",
"pin2",
"2"
],
"source_component_id": "source_component_9",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_port",
"source_port_id": "source_port_18",
"name": "SDA",
"pin_number": 3,
"port_hints": [
"SDA",
"pin3",
"3"
],
"source_component_id": "source_component_9",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_port",
"source_port_id": "source_port_19",
"name": "PGND",
"pin_number": 4,
"port_hints": [
"PGND",
"pin4",
"4"
],
"source_component_id": "source_component_9",
"subcircuit_id": "subcircuit_source_group_0",
"requires_ground": true,
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_port",
"source_port_id": "source_port_20",
"name": "NC5",
"pin_number": 5,
"port_hints": [
"NC5",
"pin5",
"5"
],
"source_component_id": "source_component_9",
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_21",
"name": "NC6",
"pin_number": 6,
"port_hints": [
"NC6",
"pin6",
"6"
],
"source_component_id": "source_component_9",
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_22",
"name": "N_C_3",
"pin_number": 7,
"port_hints": [
"N_C_3",
"pin7",
"7"
],
"source_component_id": "source_component_9",
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_23",
"name": "N_C_1",
"pin_number": 8,
"port_hints": [
"N_C_1",
"pin8",
"8"
],
"source_component_id": "source_component_9",
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_24",
"name": "VLED_POS1",
"pin_number": 9,
"port_hints": [
"VLED_POS1",
"pin9",
"9"
],
"source_component_id": "source_component_9",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_port",
"source_port_id": "source_port_25",
"name": "VLED_POS2",
"pin_number": 10,
"port_hints": [
"VLED_POS2",
"pin10",
"10"
],
"source_component_id": "source_component_9",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_port",
"source_port_id": "source_port_26",
"name": "VDD",
"pin_number": 11,
"port_hints": [
"VDD",
"pin11",
"11"
],
"source_component_id": "source_component_9",
"subcircuit_id": "subcircuit_source_group_0",
"requires_power": true,
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_port",
"source_port_id": "source_port_27",
"name": "GND",
"pin_number": 12,
"port_hints": [
"GND",
"pin12",
"12"
],
"source_component_id": "source_component_9",
"subcircuit_id": "subcircuit_source_group_0",
"requires_ground": true,
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_port",
"source_port_id": "source_port_28",
"name": "N_INT",
"pin_number": 13,
"port_hints": [
"N_INT",
"pin13",
"13"
],
"source_component_id": "source_component_9",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_port",
"source_port_id": "source_port_29",
"name": "N_C_2",
"pin_number": 14,
"port_hints": [
"N_C_2",
"pin14",
"14"
],
"source_component_id": "source_component_9",
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_component",
"source_component_id": "source_component_9",
"ftype": "simple_chip",
"name": "U7",
"manufacturer_part_number": "MAX30102EFD+T",
"supplier_part_numbers": {
"jlcpcb": [
"C2839431"
]
},
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_30",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"1",
"left"
],
"source_component_id": "source_component_10",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_port",
"source_port_id": "source_port_31",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"2",
"right"
],
"source_component_id": "source_component_10",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_component",
"source_component_id": "source_component_10",
"ftype": "simple_capacitor",
"name": "C14",
"manufacturer_part_number": "GRM21BR61E106KA73L",
"supplier_part_numbers": {
"jlcpcb": [
"C15850",
"C1713",
"C17024"
]
},
"capacitance": 0.00001,
"display_capacitance": "10uF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_32",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"1",
"left"
],
"source_component_id": "source_component_11",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_port",
"source_port_id": "source_port_33",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"2",
"right"
],
"source_component_id": "source_component_11",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_component",
"source_component_id": "source_component_11",
"ftype": "simple_capacitor",
"name": "C15",
"manufacturer_part_number": "GRM155R71C104KA88D",
"supplier_part_numbers": {
"jlcpcb": [
"C1525",
"C307331",
"C1581"
]
},
"capacitance": 1e-7,
"display_capacitance": "100nF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_34",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"1",
"left"
],
"source_component_id": "source_component_12",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_port",
"source_port_id": "source_port_35",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"2",
"right"
],
"source_component_id": "source_component_12",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_component",
"source_component_id": "source_component_12",
"ftype": "simple_capacitor",
"name": "C16",
"manufacturer_part_number": "GRM188R61A475KE15D",
"supplier_part_numbers": {
"jlcpcb": [
"C19666",
"C1705",
"C8032"
]
},
"capacitance": 0.0000047,
"display_capacitance": "4.7uF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_36",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"1",
"left"
],
"source_component_id": "source_component_13",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_port",
"source_port_id": "source_port_37",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"2",
"right"
],
"source_component_id": "source_component_13",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_component",
"source_component_id": "source_component_13",
"ftype": "simple_capacitor",
"name": "C17",
"manufacturer_part_number": "GRM155R71C104KA88D",
"supplier_part_numbers": {
"jlcpcb": [
"C1525",
"C307331",
"C1581"
]
},
"capacitance": 1e-7,
"display_capacitance": "100nF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_38",
"name": "SCL",
"pin_number": 1,
"port_hints": [
"SCL",
"pin1",
"1"
],
"source_component_id": "source_component_14",
"subcircuit_id": "subcircuit_source_group_0",
"is_input": true,
"supports_i2c_scl": true,
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_port",
"source_port_id": "source_port_39",
"name": "GND",
"pin_number": 2,
"port_hints": [
"GND",
"pin2",
"2"
],
"source_component_id": "source_component_14",
"subcircuit_id": "subcircuit_source_group_0",
"must_be_connected": true,
"requires_ground": true,
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_port",
"source_port_id": "source_port_40",
"name": "ALERT",
"pin_number": 3,
"port_hints": [
"ALERT",
"pin3",
"3"
],
"source_component_id": "source_component_14",
"subcircuit_id": "subcircuit_source_group_0",
"is_output": true,
"needs_external_pullup": true,
"can_use_open_drain": true,
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_port",
"source_port_id": "source_port_41",
"name": "ADD0",
"pin_number": 4,
"port_hints": [
"ADD0",
"pin4",
"4"
],
"source_component_id": "source_component_14",
"subcircuit_id": "subcircuit_source_group_0",
"is_input": true,
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_port",
"source_port_id": "source_port_42",
"name": "V_POS",
"pin_number": 5,
"port_hints": [
"V_POS",
"pin5",
"5"
],
"source_component_id": "source_component_14",
"subcircuit_id": "subcircuit_source_group_0",
"must_be_connected": true,
"requires_power": true,
"should_have_decoupling_capacitor": true,
"recommended_decoupling_capacitor_capacitance": "100nF",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_port",
"source_port_id": "source_port_43",
"name": "SDA",
"pin_number": 6,
"port_hints": [
"SDA",
"pin6",
"6"
],
"source_component_id": "source_component_14",
"subcircuit_id": "subcircuit_source_group_0",
"is_input": true,
"is_output": true,
"is_bidirectional": true,
"supports_i2c_sda": true,
"needs_external_pullup": true,
"can_use_open_drain": true,
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_port",
"source_port_id": "source_port_44",
"name": "EP",
"pin_number": 7,
"port_hints": [
"EP",
"pin7",
"7"
],
"source_component_id": "source_component_14",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_component",
"source_component_id": "source_component_14",
"ftype": "simple_chip",
"name": "U8",
"manufacturer_part_number": "TMP117AIDRVR",
"supplier_part_numbers": {
"jlcpcb": [
"C699536"
]
},
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_45",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"1",
"left"
],
"source_component_id": "source_component_15",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_port",
"source_port_id": "source_port_46",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"2",
"right"
],
"source_component_id": "source_component_15",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_component",
"source_component_id": "source_component_15",
"ftype": "simple_capacitor",
"name": "C18",
"manufacturer_part_number": "GRM155R71C104KA88D",
"supplier_part_numbers": {
"jlcpcb": [
"C1525",
"C307331",
"C1581"
]
},
"capacitance": 1e-7,
"display_capacitance": "100nF",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_47",
"name": "pin1",
"pin_number": 1,
"port_hints": [
"pin1",
"anode",
"pos",
"left",
"1"
],
"source_component_id": "source_component_16",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_port",
"source_port_id": "source_port_48",
"name": "pin2",
"pin_number": 2,
"port_hints": [
"pin2",
"cathode",
"neg",
"right",
"2"
],
"source_component_id": "source_component_16",
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_component",
"source_component_id": "source_component_16",
"ftype": "simple_resistor",
"name": "R6",
"manufacturer_part_number": "RC0402FR-0710KL",
"supplier_part_numbers": {
"jlcpcb": [
"C25744",
"C25531",
"C60489"
]
},
"resistance": 10000,
"display_resistance": "10kΩ",
"are_pins_interchangeable": true,
"source_group_id": "source_group_0"
},
{
"type": "source_net",
"source_net_id": "source_net_3",
"name": "SCL",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_net",
"source_net_id": "source_net_4",
"name": "SDA",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_net",
"source_net_id": "source_net_5",
"name": "PPG_INT",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_net",
"source_net_id": "source_net_6",
"name": "TEMP_ALERT",
"member_source_group_ids": [],
"is_ground": false,
"is_power": false,
"is_positive_voltage_source": false,
"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net6"
},
{
"type": "source_board",
"source_board_id": "source_board_0",
"source_group_id": "source_group_0"
},
{
"type": "source_refdes_convention_warning",
"source_refdes_convention_warning_id": "source_refdes_convention_warning_0",
"warning_type": "source_refdes_convention_warning",
"message": "The \"J\" prefix is being used with a <chip />, try using it with a <connector /> or <jumper />",
"source_component_id": "source_component_0",
"refdes": "J_TAIL",
"source_component_ftype": "simple_chip",
"expected_prefixes": [
"U",
"IC"
],
"actual_prefix": "J"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_0",
"connected_source_port_ids": [
"source_port_8"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".TP1 > .pin1 to net.GND",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_1",
"connected_source_port_ids": [
"source_port_0",
"source_port_8"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"name": "TAIL_1",
"display_name": ".J_TAIL > .pin1 to .TP1 > .pin1",
"min_trace_thickness": 0.3,
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_2",
"connected_source_port_ids": [
"source_port_9"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".TP2 > .pin1 to net.V3V3",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_3",
"connected_source_port_ids": [
"source_port_1",
"source_port_9"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"name": "TAIL_2",
"display_name": ".J_TAIL > .pin2 to .TP2 > .pin1",
"min_trace_thickness": 0.3,
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_4",
"connected_source_port_ids": [
"source_port_10"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".TP3 > .pin1 to net.GND",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_5",
"connected_source_port_ids": [
"source_port_2",
"source_port_10"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"name": "TAIL_3",
"display_name": ".J_TAIL > .pin3 to .TP3 > .pin1",
"min_trace_thickness": 0.3,
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_6",
"connected_source_port_ids": [
"source_port_11"
],
"connected_source_net_ids": [
"source_net_3"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".TP4 > .pin1 to net.SCL",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_7",
"connected_source_port_ids": [
"source_port_3",
"source_port_11"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"name": "TAIL_4",
"display_name": ".J_TAIL > .pin4 to .TP4 > .pin1",
"min_trace_thickness": 0.3,
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_8",
"connected_source_port_ids": [
"source_port_12"
],
"connected_source_net_ids": [
"source_net_4"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".TP5 > .pin1 to net.SDA",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_9",
"connected_source_port_ids": [
"source_port_4",
"source_port_12"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"name": "TAIL_5",
"display_name": ".J_TAIL > .pin5 to .TP5 > .pin1",
"min_trace_thickness": 0.3,
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_10",
"connected_source_port_ids": [
"source_port_13"
],
"connected_source_net_ids": [
"source_net_5"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".TP6 > .pin1 to net.PPG_INT",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_11",
"connected_source_port_ids": [
"source_port_5",
"source_port_13"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"name": "TAIL_6",
"display_name": ".J_TAIL > .pin6 to .TP6 > .pin1",
"min_trace_thickness": 0.3,
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_12",
"connected_source_port_ids": [
"source_port_14"
],
"connected_source_net_ids": [
"source_net_2"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".TP7 > .pin1 to net.V1V8",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_13",
"connected_source_port_ids": [
"source_port_6",
"source_port_14"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"name": "TAIL_7",
"display_name": ".J_TAIL > .pin7 to .TP7 > .pin1",
"min_trace_thickness": 0.3,
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_14",
"connected_source_port_ids": [
"source_port_15"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".TP8 > .pin1 to net.GND",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_15",
"connected_source_port_ids": [
"source_port_7",
"source_port_15"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"name": "TAIL_8",
"display_name": ".J_TAIL > .pin8 to .TP8 > .pin1",
"min_trace_thickness": 0.3,
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_16",
"connected_source_port_ids": [
"source_port_0",
"source_port_2"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"name": "TAIL_GROUND_13",
"display_name": ".J_TAIL > .pin1 to .J_TAIL > .pin3",
"min_trace_thickness": 0.2,
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_17",
"connected_source_port_ids": [
"source_port_2",
"source_port_7"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"name": "TAIL_GROUND_38",
"display_name": ".J_TAIL > .pin3 to .J_TAIL > .pin8",
"min_trace_thickness": 0.2,
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_18",
"connected_source_port_ids": [
"source_port_12",
"source_port_18"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"name": "PPG_SDA_ESCAPE",
"display_name": ".TP5 > .pin1 to .U7 > .SDA",
"min_trace_thickness": 0.15,
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_19",
"connected_source_port_ids": [
"source_port_13",
"source_port_28"
],
"connected_source_net_ids": [],
"subcircuit_id": "subcircuit_source_group_0",
"name": "PPG_INT_BOTTOM_ESCAPE",
"display_name": ".TP6 > .pin1 to .U7 > .N_INT",
"min_trace_thickness": 0.15,
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_20",
"connected_source_port_ids": [
"source_port_17"
],
"connected_source_net_ids": [
"source_net_3"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".U7 > .SCL to net.SCL",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net2"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_21",
"connected_source_port_ids": [
"source_port_18"
],
"connected_source_net_ids": [
"source_net_4"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".U7 > .SDA to net.SDA",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net3"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_22",
"connected_source_port_ids": [
"source_port_19"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".U7 > .PGND to net.GND",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_23",
"connected_source_port_ids": [
"source_port_27"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".U7 > .GND to net.GND",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_24",
"connected_source_port_ids": [
"source_port_24"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".U7 > .VLED_POS1 to net.V3V3",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_25",
"connected_source_port_ids": [
"source_port_25"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".U7 > .VLED_POS2 to net.V3V3",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_26",
"connected_source_port_ids": [
"source_port_26"
],
"connected_source_net_ids": [
"source_net_2"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".U7 > .VDD to net.V1V8",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net5"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_27",
"connected_source_port_ids": [
"source_port_28"
],
"connected_source_net_ids": [
"source_net_5"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".U7 > .N_INT to net.PPG_INT",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net4"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_28",
"connected_source_port_ids": [
"source_port_30"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".C14 > .pin1 to net.V3V3",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_29",
"connected_source_port_ids": [
"source_port_31"
],
"connected_source_net_ids": [
"source_net_0"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".C14 > .pin2 to net.GND",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_30",
"connected_source_port_ids": [
"source_port_32"
],
"connected_source_net_ids": [
"source_net_1"
],
"subcircuit_id": "subcircuit_source_group_0",
"display_name": ".C15 > .pin1 to net.V3V3",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "source_trace",
"source_trace_id": "source_trace_31",
"connected_source_port_ids": [
"source_port_33"
],
"connected_source_net_ids": [
"source_net_0"
],
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{
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{
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{
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{
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{
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{
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"source_port_47"
],
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"source_net_1"
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{
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{
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{
"type": "schematic_text",
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},
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{
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{
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{
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{
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{
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{
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{
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"pin1": "SCL",
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{
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{
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"symbol_name": "boxresistor_down",
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{
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"name": "unnamed_board1",
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},
{
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{
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{
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{
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{
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{
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{
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{
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{
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],
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}
],
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},
{
"type": "pcb_trace",
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"pcb_port_35",
"pcb_port_39"
],
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{
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{
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}
],
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},
{
"type": "pcb_via",
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},
{
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},
{
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},
{
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},
{
"type": "pcb_via",
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},
{
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},
{
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},
{
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},
{
"type": "pcb_via",
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},
{
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},
{
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"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "pcb_via",
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"pcb_trace_id": "source_net_1_mst5_0",
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"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net1"
},
{
"type": "pcb_via",
"pcb_via_id": "pcb_via_18",
"pcb_trace_id": "source_net_1_mst6_0",
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},
{
"type": "pcb_via",
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"pcb_trace_id": "source_net_1_mst6_0",
"x": 8.405,
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],
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},
{
"type": "pcb_via",
"pcb_via_id": "pcb_via_20",
"pcb_trace_id": "source_net_0_mst6_0",
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],
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"subcircuit_id": "subcircuit_source_group_0",
"subcircuit_connectivity_map_key": "unnamedsubcircuitsubcircuit_source_group_0_connectivity_net0"
},
{
"type": "pcb_trace_warning",
"pcb_trace_warning_id": "pcb_trace_warning_0",
"warning_type": "pcb_trace_warning",
"message": "Trace [.J_TAIL > .pin5 to .TP5 > .pin1] is routed thinner than requested (requested: 0.3mm, actual: 0.15mm).",
"center": {
"x": 1.182959483814379,
"y": 0.3086554958606691
},
"source_trace_id": "source_trace_9",
"pcb_trace_id": "pcb_trace_10",
"pcb_component_ids": [
"pcb_component_0",
"pcb_component_5"
],
"pcb_port_ids": [
"pcb_port_4",
"pcb_port_12"
]
},
{
"type": "source_project_metadata",
"source_filesystem_md5_hash": "75527ea64117500af76a4e8f0d92c5c4"
}
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