Summary: Calculates target inductance and estimated resonance for a 14.5 MHz square antenna using chip, interturn, bridge, and connection capacitances.
# Reference blade NFC prototype
The blade silhouette, guard opening, angular panels and diamond grip are vector traces of the supplied reference image. The top uses white silkscreen on black solder mask. `blade-outline.ts` contains the routed geometry and `silkscreen-artwork.ts` contains the editable line paths.
The board measures approximately 36.52 × 155.78 mm. Use 2-layer FR-4, 1.6 mm thickness and 35 µm copper. All top artwork uses 0.20 mm strokes. The generated Circuit JSON was checked independently: minimum ink clearance to routed edges is 0.204 mm, copper clearance is 0.663 mm, and ink clearance to drill openings is 0.431 mm. The lines join and cross where the reference does so. Review the fabricator's preview for minimum printable details and its router radius at the blade notches.
The NFC circuit retains NT2H1311F0DTLH (NTAG213F), with an 11-turn, 16.2 mm outer-copper square antenna. The chip and antenna were translated by +1 mm in X and Y to fit the traced silhouette. The chip is now at (1, 45) mm and antenna center at (1, 56) mm. Electrical values and antenna winding geometry are unchanged. This version does not implement a different ST chip.
The build has zero circuit errors and two autorouted RF connections. Minimum RF track clearance to antenna windings is 0.800 mm. TypeScript checking passes. The three build notices concern the printed coil's absent conventional courtyard and the passive chip's lack of required power/ground pins.
## Rebuild
```sh
bun install --frozen-lockfile
bun run build
bun node_modules/.bin/tsc --noEmit
bun node_modules/.bin/tsci export dist/index/circuit.json -f gerbers -o fabrication.zip
```
For an offline build using the bundled chip footprint:
```sh
bun node_modules/.bin/tsci build index.tsx --disable-parts-engine --solver-debug --autorouter-timeout 60s --autorouter-dump-srj all
bun scripts/check-build.mjs
```
The dependency patch is needed for diagonal antenna obstacles and for omitting solder paste on the antenna's tented plated hole. Keep `patches/` and `bun.lock` with the source. Export paths in this CLI resolve beside the Circuit JSON, so `fabrication.zip` is written to `dist/index/`.
## Prototype status
The geometry/build checks establish layout clearance; they do not verify NFC operation or read range. Antenna inductance and capacitance remain estimates. Measure the fabricated antenna, tune resonance, and test reads/writes with the intended phones and enclosure. The included NFC design is a separate prototype from the ST eDesignSuite examples discussed earlier.
Only U1 is purchased and assembled; L1 is printed copper. The exporter cannot confirm U1's assembly rotation because supplier pin-1 location metadata is missing. Review the pick-and-place orientation against the chip datasheet and footprint pin-1 mark before assembly.
The silkscreen preview is drawn from the generated Circuit JSON. Manufacturer printing tolerances and routed corner radii will affect the physical result.