hrithik18k/switch-pcb

relay-placement.log

placement summary: no placement issues

board top-layer utilization:
- occupied: 16.124% (386.968mm^2 of 2400mm^2)
- empty spaces over 5% of board area:
  - 22.547% (541.12mm^2); bounds=(minX=-10.32mm, maxX=14mm, minY=-24mm, maxY=-1.75mm)
  - 17.146% (411.5mm^2); bounds=(minX=-25mm, maxX=25mm, minY=15.77mm, maxY=24mm)
  - 9.541% (228.974mm^2); bounds=(minX=-25mm, maxX=-18.68mm, minY=-24mm, maxY=12.23mm)

board-edge status:
- K1: 14.96mm inside left edge
- J1: 5.71mm inside left edge
- Q1: 7.5mm inside left edge
- D1: 6.9mm inside left edge
- R1: 6.575mm inside left edge
- R2: 11.575mm inside left edge
- J2: 6mm inside right edge
- J3: 6mm inside right edge

placement drc:
Errors: 0
Warnings: 0