abse/smartwatch-flex-top-only

Three-panel flex smartwatch with two parallel R3.9 bends, all components flat-top, low-profile JST connector harnesses, split heartbeat optical windows and screw-retained PCB mounting. Modeled 39 × 50.5 × 14.5mm prototype; 100% routing, zero native DRC and shorts. Hardware qualification pending.

Version
0.2.20
License
unset
Stars
0

scripts/prepare-external-shorts-check.mjs

import fs from 'node:fs'
import {createHash} from 'node:crypto'

// Native bitmap shorts checking treats a printed two-terminal winding as an
// ordinary board wire. Keep its raw results, and separately test the external
// routing with only the component's intrinsic winding copper removed. The full
// board still undergoes exact winding/contact/clearance and drill audits.
const [sourceFile,outputFile,reportFile]=process.argv.slice(2)
const circuit=JSON.parse(fs.readFileSync(sourceFile))
const coil=circuit.find(e=>e.type==='source_component'&&['LRX','L6'].includes(e.name))
if(!coil||coil.ftype!=='simple_inductor') throw Error('Expected printed LRX inductor')
const pcb=circuit.find(e=>e.type==='pcb_component'&&e.source_component_id===coil.source_component_id)
const winding=circuit.filter(e=>e.type==='pcb_trace'&&e.pcb_component_id===pcb.pcb_component_id)
if(winding.length!==1)throw Error('Expected one component-owned winding')
const trace=winding[0]
const vias=circuit.filter(e=>e.type==='pcb_via'&&e.pcb_trace_id===trace.pcb_trace_id)
if(vias.length!==2)throw Error('Expected two native winding transitions')
const ports=circuit.filter(e=>e.type==='pcb_port'&&e.pcb_component_id===pcb.pcb_component_id)
if(ports.length!==2)throw Error('Expected two external winding terminals')
const nets=ports.map(p=>circuit.find(t=>t.type==='source_trace'&&t.connected_source_port_ids.includes(p.source_port_id))?.connected_source_net_ids?.[0])
const names=nets.map(n=>circuit.find(e=>e.type==='source_net'&&e.source_net_id===n)?.name).sort()
if(JSON.stringify(names)!==JSON.stringify(['QI_AC2','QI_COIL1']))throw Error('Unexpected winding net identities')
const filtered=circuit.filter(e=>e!==trace&&!vias.includes(e))
fs.writeFileSync(outputFile,JSON.stringify(filtered,null,2)+'\n')
const sha=f=>createHash('sha256').update(fs.readFileSync(f)).digest('hex')
fs.writeFileSync(reportFile,JSON.stringify({sourceFile,sourceSha256:sha(sourceFile),outputFile,outputSha256:sha(outputFile),removedComponentOwnedTrace:trace.pcb_trace_id,removedComponentOwnedViaIds:vias.map(v=>v.pcb_via_id),retainedExternalPortIds:ports.map(p=>p.pcb_port_id),externalNetNames:names,method:'External PCB bitmap/Gerber shorts check excludes only intrinsic printed-inductor winding copper. Original full-board raw results are retained; full winding geometry, external turn contacts and every manufacturing drill are checked separately. No electrical nets are merged or aliased.'},null,2)+'\n')
console.log('Prepared external shorts input; intrinsic winding only:',trace.pcb_trace_id)