abse/boostxl-ads7841-q1

docs/order-readiness.md

# First-article release review

## Verdict

**Approved for a small first-article prototype order only.** This is not an exact automotive-Q1 BOM clone: the two regulator imports are electrically/package-compatible non-Q1 JLC/LCSC parts and must not be represented as the original qualified suffixes.

## Closed release gates

- Values, fitted/DNP state, and connectivity are checked against SNAU229 Tables 1–2 and Figure 19.
- Every populated non-passive has local JLCPCB/LCSC provenance. U1 uses REG71055DDCR (C2071120) and U2 uses TPS79901DRVR (C398922), with verified numeric pin maps and imported production footprints.
- Four layers, 0.30/0.45 mm via limits, 207 routed traces, no jumpers, zero generated errors, and passing top/bottom PCB short scans.
- Four meaningful schematic sheets remain readable without explicit `<netlabel>` components.

## Mandatory first-article gates

1. Print the fabrication output at 1:1 and check the provisional 82 × 54 mm outline, four mounting holes, both LaunchPad socket rows, test points, and board-edge connectors against the intended mechanics. TI did not publish separate authoritative fabrication CAD for this board.
2. Confirm socket mating height/insertion side, J10/J15 header geometry, the optional 5-1814832-2 SMA footprint, EEPROM suffix, and all jumper/shunt positions.
3. In the board-house viewer, inspect all four copper layers, drills, mask, paste, silkscreen, component rotation, and courtyards; resolve every warning before payment.
4. Order 2–5 boards. Use a current-limited supply; verify 5.5 V, LDO output, reference, EEPROM, SPI timing, shutdown, noise, and all four ADC channels before normal use.

This release is suitable for first-article validation. It is not qualified for automotive use or quantity production.