README.md
# MSP-EXP430G2ET LaunchPad - tscircuit edition
A four-layer tscircuit recreation of TI's MSP-EXP430G2ET LaunchPad development kit. Its three electronic schematic sheets follow the organization of TI's assembly schematic: protected USB and eZ-FET host, target power and isolation, and the socketed MSP430G2553 target with its 20-pin BoosterPack interface.
## Implemented hardware
- Socketed MSP430G2553IN20 target with the reference 20-pin DIP pin map, supply decoupling, reset circuit, and Spy-Bi-Wire programming.
- Two 10-pin headers forming TI's 20-pin BoosterPack interface, including UART, GPIO, reset, test, power, and ground mappings.
- Two user LEDs, two pushbuttons, a six-pin RGB LED, and the reference-default P2.6/P2.7 header paths.
- DNP 32.768 kHz crystal option with fitted zero-ohm selection links and 12 pF load capacitors.
- MSP430F5528-based eZ-FET debugger, protected Micro-USB interface, 4 MHz resonator, three status LEDs, and a seven-pin host programming header.
- Seven removable shunts for SBW, UART, 3.3 V, 5 V, and ground isolation, plus external 3.3 V/5 V headers and a ground test point.
## Power and jumper defaults
- Fit J_ISO_TST, J_ISO_RST, J_ISO_RX, J_ISO_TX, J_ISO_3V3, J_ISO_5V, and J_ISO_GND for normal USB-powered programming, UART, and target operation.
- J_EXT_3V3 exposes the regulated target rail; only connect an external regulated 3.3 V source after removing J_ISO_3V3.
- J_EXT_5V exposes USB VBUS through J_ISO_5V. It is not a regulated input.
- Leave Y_TARGET, C_XIN, and C_XOUT unpopulated for the reference-default P2.6/P2.7 GPIO/header configuration. Reconfigure the zero-ohm links and firmware before fitting the crystal branch.
## Intentional reference deviation
TI's software-controlled EnergyTrace supply is replaced by a conventional TLV70033 3.3 V regulator and removable power links. Programming, backchannel UART, target operation, user I/O, and BoosterPack connectivity remain usable; EnergyTrace current profiling is not implemented.
## Manufacturing status
- Default tscircuit autorouter: 155 PCB traces and 90 vias, with zero Circuit JSON error elements.
- Gerber all-layer short check at default and 40 pixels/mm: no shorts detected.
- Source, readable-netlist, placement, and schematic-sheet-boundary checks: clean.
- Four copper layers, 0.15 mm minimum trace width, 0.30 mm minimum via hole, and 0.45 mm minimum via pad.
- The fabrication archive contains top, bottom, and two inner copper layers; top/bottom mask, paste, and silkscreen; board outline; plated and non-plated drills; BOM; and pick-and-place data.
The build retains one 10.38 mm oscillator-length advisory on the optional 32.768 kHz branch. The branch is explicitly DNP in the default assembly, its copper is clearance-clean, and the Gerber checker finds no short.
## References
- TI MSP-EXP430G2ET tool page: https://www.ti.com/tool/MSP-EXP430G2ET
- TI MSP-EXP430G2ET LaunchPad development kit user guide: https://www.ti.com/lit/ug/slau772a/slau772a.pdf
## Build and verify
```sh
bun install
bun run typecheck
bunx tsci check source
bunx tsci check netlist
bunx tsci check placement
bunx tsci build --autorouter-timeout 300000
bunx tsci export index.circuit.tsx --format gerbers --output dist/gerbers.zip
bunx tsci check shorts index.circuit.tsx --mode gerber --layer all
bun run render
```
