AnasSarkiz/muse-voice-remote

vendor/SOURCES.md

# JLCPCB component import provenance

All 146 populated PCB devices instantiate the 55 imported JLCPCB/EasyEDA components in imports/. Each import retains its exact supplier C-number through supplierPartNumbers. The official easyeda@0.0.372 converter generates exact supplied footprints; no footprinter approximation or hand-drawn electronic pads are used. Four PCB mounting holes are mechanical features outside the electronic BOM.

Original supplier responses, ownership/license metadata and raw SHA-256 hashes are retained under vendor/jlcpcb/. import-manifest.json records source URLs, generated component hashes and converter version. imports/index.ts collects generated exports; MuseVoiceRemote.circuit.tsx places and connects them. The converter software is MIT licensed; supplier data remains attributed to its recorded owners.

Supplier OBJ and STEP CAD links are retained for every import and every placed component. The upstream converter omits these links when its model URL probe fails; scripts/preserve-jlcpcb-cad.ts prevents that omission. When model downloads are blocked, it preserves supplier URLs, UUIDs and rotation without inventing model dimensions or Z offsets. Original model metadata remains in the retained supplier Circuit JSON. Model bounds, loading and enclosure fit remain unverified until downloads are allowed. No replacement or hand-drawn 3D models are substituted.

Some EasyEDA symbols repeat SPICE ordering instead of physical package numbering, notably ESP32-S3. The adapter uses displayed physical pin numbers when producing symbol metadata. Corrections are listed in the manifest. The original response is retained, package/footprint data is untouched, and pin roles are tested against manufacturer documentation.

For native routing/DRC, easyeda2kicad@1.0.1 converts those same package records into vendor/jlcpcb/library/. Its exporter marks mechanical HOLE entries as plated and adds a 0.1 mm stroke to filled copper polygons. The conversion adapter corrects the plating metadata and removes that artificial stroke to preserve supplier geometry. Native-library hashes and corrections are recorded. Board placement aligns the supplier origin with tscircuit's recentered origin through actual pad positions within 0.02 mm, accounting for 0.01 mm exporter rounding. Native library silk markings are retained on the assembly/Fab layer to prevent copper/silk conflicts; copper, mask and paste remain imported geometry.

Selected stock substitutions include the Hirose FH12A-50S-0.5SH(55) top-contact connector, TLV70228DBVR 2.8 V LDO, Samsung 10 uF and Murata 22 uF capacitors, full JST SH ordering suffix, Uniroyal 3.24 kohm resistor and HRO TYPE-C-31-M-12 USB connector. Exact official JLCPCB inventory responses are retained in docs/jlcpcb-audit/. The initial 41/46 availability audit is preserved in docs/jlcpcb-original-bom-audit.json; the current stock audit covers all 55 selected part numbers. Earlier KiCad/Adafruit/Espressif files and licenses remain historical references; current populated parts use JLCPCB imports.

Manufacturer pinouts, enclosure/acoustic fit, FPC folding, stock at checkout, USB/power/RF behavior and hardware tests need qualification before fabrication. The exact ER-TFT028A2-4 panel is an off-board part connected through the imported FPC connector. Supplier documents are references and do not authorize fabrication or prescribe assistant behavior.

U1 now imports ESP32-S3R8 QFN56 (C2913194), with a separate 8 MB W25Q64JVSSIQ flash IC, 40 MHz crystal, power filtering and RF front end. See docs/bare-s3.md and the retained Espressif guidelines. Supplier thermal VIA entries inside pad 57 become plated holes tied to that original pad; positions, copper diameters and drill diameters remain imported. The native adapter distinguishes these plated vias from mechanical HOLE entries and explicitly marks original custom copper polygons as filled. No new electronic land pattern is drawn.