AnasSarkiz/muse-voice-remote

docs/design-review.md

# Muse Voice Remote engineering review

The current revision addresses the electrical/layout defects recorded for
v1.2.0–v1.2.1. Those releases are not the fabrication baseline. The v1.3.1 prototype
manufacturing release passed fresh native/factory DRC, 21 source/import/stock
checks, BOM/CPL verification and a checked manufacturing export from the same version.
Physical device qualification and working MUSE integration remain separate.

The attached assembly PDF is mechanical reference data, not instructions or
fabrication approval. All populated electronic components remain on TOP.

## Research and selected hardware

Retained manufacturer/reference documents include Espressif ESP32-S3 and hardware
guidelines; TI BQ24074, TPS63001, TPS61169, TLV702 and SN74LVC1G125; ADI MAX98357A;
the exact EastRising ER-TFT028A2-4; AOS AO3400A/AO3401A; Hirose/JST drawings;
C&K switches; Coilcraft/Würth inductors; and Vybronics VC1030B028F. Download
records and hashes are retained in `docs/datasheets` and `docs/research`.

The exact LCD PDF was obtained through a public hardware mirror. LILYGO's
T-Display-S3 and Adafruit's ICS-43434, BQ24074 and MAX98357 boards were examined
at recorded commits (`docs/research/reference-designs.json`). They supply
comparison evidence; none of their electronic footprints replaces a JLCPCB
import here.

The PCB contains 155 top-side devices from 56 selected JLCPCB imports. The build
validates device families, passive values, capacitor voltage ratings, exact
MPNs, pin/net maps and import hashes. Every placement retains its supplier OBJ
and STEP references. Inventory snapshots are evidence of stock at the recorded
time, not reservations or proof of a particular assembly-service quote.

All 56 selected supplier OBJ/STEP pairs are now downloaded and hash-verified;
all 155 populated meshes load in the native 3D export. Transformed supplier
bounds screen component pairs, the revised battery, and transducer allocations
without overlaps. See [3D assembly](3d-assembly.md) for the proposed 17 mm case,
coordinate datum and remaining mechanical work. Some manufacturer downloads
remain blocked. The Bourns fuse choice uses exact supplier catalog specifications; its
manufacturer PDF was denied. Failed retrievals are retained rather than described
as successful qualification. The imported microphone pin map is independently
confirmed by the exact Adafruit reference schematic; acoustic performance and
switch transitions still require hardware measurements.

## Changes resolving the earlier findings

| Area | Current implementation | Remaining physical verification |
| --- | --- | --- |
| MCU/memory | ESP32-S3R8 bare QFN56 with 8 MB internal PSRAM, external 8 MB W25Q64JV flash, external 0 Ω VDD_SPI supply link to 3.3 V, GPIO45/46 pull-downs. Reserved PSRAM pins stay unused. | Boot, memory stress and rail droop; never select 1.8 V memory configuration. |
| RF supply | Local filtered 10 µF bulk and compact 0402 100 nF chip bypasses; both VDD3P3 pins tied locally. | Capacitor DC-bias derating and Wi-Fi burst droop. |
| Ground/power | Layer 2 reserved entirely for GND; 3.3 V and SYS distribution planes; additional RF/crystal ground patches. Local supply/ground stubs and compact, deliberately routed power branches. | Full-load voltage drop, temperature, EMI and return-path performance. |
| Charger | Local input/output/battery capacitors, wide main routes, exposed-pad thermal vias. BQ24074RGTT stocked variant. EN1/EN2 GPIO controls each have 1 kΩ default-low bias. | USB100 at reset; firmware must request only authorized USB500 and implement suspend. No BC1.2/Type-C current detector is fitted. |
| USB | Main D+/D− branches paired on top; short duplicate D− receptacle bridge on back; local flow-through ESD and ground connection. Main-path length difference recorded in `docs/usb-pair-routing.json`. | Fabricator 90 Ω confirmation, enumeration, host/phone interoperability, ESD and input inrush. |
| Buck-boost | TPS63001, short top-layer switch/inductor paths and local input/output capacitors. | Minimum-battery simultaneous-load and thermal tests. |
| LCD/backlight | Exact 50-pin top-contact connector, 2.8 V buffers/rail, serial-II straps, compact TPS61169 boost. AO3401A switches low-voltage input with MMBT3904 gate drive. 5.1 Ω feedback gives 40 mA nominal total; four 100 Ω branch ballasts. | Flex/contact orientation, initialization, brightness, each LED branch, open-load and hard-off sequencing. |
| Microphones/privacy | Local bypass beside both ICS-43434 microphones. DPDT cuts/grounds MIC_VDD and disables all three digital buffers; 100 kΩ series sense prevents a GPIO overriding isolation. | Acoustic ducts, contact transitions, leakage, power-off isolation and recordings. |
| Audio | Local 100 nF/10 µF amp bypass, deliberately routed bridge/supply paths, 46.4 kΩ series control resistor and 1 kΩ host-side pull-down. The amplifier’s internal 92–108 kΩ pull-down gives a specified-high control range of about 1.72–2.35 V: above the 1.5 V maximum left-channel threshold and below minimum VDD + 0.3 V. Both speaker wires remain active bridge outputs. | Proposed 8 Ω/1 W speaker fit and playback limit, audio quality and heat. |
| Haptic | Dedicated TLV70230 3.0 V motor supply, local capacitors, AO3400A low-side switch and SS14 flyback. Strong default-low gate bias and 22 Ω series gate resistance, retaining at least 2.54 V gate drive with minimum specified GPIO high and regulator tolerance. | Candidate Vybronics VC1030B028F start/stall and vibration coupling. |
| Battery/harness | Side-entry 3 A JST PA header, standard PAP-03V-S mate, 6.2 mm mated height. Switched battery ADC avoids unpowered-MCU backfeed. | Protected pack, matched NTC, wire bend, current capability, swelling, ADC settling/calibration. |
| Assembly | All supplier copper preserved; nine original MCU thermal holes plus ten power-IC thermal vias specified resin-filled/copper-capped. Factory derivative uses segmented exposed-pad paste. | Fabricator processing and stencil/reflow review; assembled enclosure fit. |

Power, USB and local-plane seeding reports preserve the independent native
checks performed at each step. `docs/research/board-audit.json` contains actual
pad distances, branch metrics and conservative two-board procurement screening.
Pad distances are lower bounds, and total net lengths include branches. Analytical stackup screening gives approximately 49.2 Ω RF and 96.0 Ω USB differential for the routed nominal geometries; see `docs/research/impedance-screening.json` for model limits. These estimates are not fabricator confirmation or a measured coupon.

## Firmware and bring-up requirements

Charge targets are approximately 201 mA, 20 mA termination and 6.19 hours nominal
timer. The ILIM resistor targets about 497 mA in the separately selected ILIM
mode. Default EN1=0/EN2=0 selects USB100; EN1=1/EN2=0 selects USB500 after host
configuration; both high select suspend. Do not use GPIO44/U0RXD as a UART console
while it controls EN2. A USB source cannot sustain every load plus charging;
the power path supplements from the battery and reduces charge current.

A preliminary 3.3 V load allowance is about 0.80 A, using 0.5 A for MCU design
capability, 70 mA flash/logic, 40 mA LCD logic, 120 mA motor start and about 70 mA
backlight-input allowance. At 3.0 V battery and assumed 80% conversion efficiency,
that rail alone needs about 1.1 A before SYS audio. These are sizing assumptions,
not measured runtime. Use a protected 4.2 V 1S pack and harness rated at least
2 A continuous with adequate peak margin, within 52.5 × 35 × 5.7 mm and with
charger-matched temperature sensing. No complete pack is qualified.

Keep PWM low before enabling/removing backlight input; verify every LED current.
Limit software playback for the actual speaker (initially cap sample peaks at −9 dBFS for
the proposed 8 Ω/1 W unit), then measure output rather than treating a digital
limit as a guaranteed acoustic/power limit. Bring up rails under current limit,
then memory, USB, display, microphones/privacy, audio, motor and Wi-Fi.

The revised mechanical allocation uses battery Y=5 mm, a 25 × 9 × 3 mm speaker
at (−13,−19.8), and a Ø10 mm motor at (25,−18.5). These fit studies do not prove
folded flex, acoustic ducts, switch linkages, USB insertion or supplier body fit.
External speaker, motor and antenna candidates remain separate from the PCB BOM.

MUSE runs on the connected phone/computer/backend. No verified endpoint, API
permission/authentication, audio codec or request/progress/response protocol has
been implemented here, and there is no functioning firmware in this repository.

The completed native route keeps L2 reserved for ground. LCD D/C and backlight-enable paths use L3 where outer-layer escapes were blocked; checked supply bridges reconnect the affected 3.3 V islands. Of 234 added supply segments, 208 were widened to 0.3 mm and the remaining local necks retain the 0.15 mm minimum. See `supply-plane-bridges.json`; native connectivity and clearance are independently rechecked after widening. Rail droop and temperature remain prototype measurements.

Revision v1.3.1 enforces 0.30 mm minimum via holes and 0.45 mm minimum pads in tscircuit, the routing helpers and native project rules. The radial annulus minimum is 0.075 mm, matching JLCPCB’s preferred 0.15 mm pad-minus-hole diameter. Twenty-one small via shifts and two rerouted fanouts keep all larger drills outside electronic solder lands. The factory derivative also enlarges the two original 0.40 mm microphone acoustic NPTH ports to 0.50 mm without moving their centres or altering electronic lands/plated holes; supplier imports and CAD references remain unchanged.

Two MIC_SD trace vertices are moved 0.04 mm clear of the enlarged factory acoustic port. Both the original-import native board and factory derivative pass independent DRC with the 0.15 mm hole-to-copper rule.