0hmX/simplified-am62l-computer

This code defines components and scripts for physically representing and routing high-speed DDR memory signals, power lines, and ground planes on an 8-layer PCB with detailed pin assignments, copper pours, and precise via and trace layouts based on TI EVM reference data.

Version
1.0.16
License
unset
Stars
0

imports/index.ts

export { USB4125_GF_A_0190 } from "./USB4125_GF_A_0190/USB4125_GF_A_0190"
export { TPS259470LRPWR } from "./TPS259470LRPWR/TPS259470LRPWR"
export { TPS62A02DRLR } from "./TPS62A02DRLR/TPS62A02DRLR"
export { DFE201612PD_1R0M_P2 } from "./DFE201612PD_1R0M_P2/DFE201612PD_1R0M_P2"
export { XRCGB25M000F3A00R0 } from "./XRCGB25M000F3A00R0/XRCGB25M000F3A00R0"
export { DM3AT_SF_PEJM5 } from "./DM3AT_SF_PEJM5/DM3AT_SF_PEJM5"
export { TPS22918DBVR } from "./TPS22918DBVR/TPS22918DBVR"
export { TPD4E02B04DQAR } from "./TPD4E02B04DQAR/TPD4E02B04DQAR"
export { SN74AXC1T45DBVR } from "./SN74AXC1T45DBVR/SN74AXC1T45DBVR"
export { TPD2E2U06DCKR } from "./TPD2E2U06DCKR/TPD2E2U06DCKR"
export { S4B_PH_SM4_K_TB_LF__SN_ } from "./S4B_PH_SM4_K_TB_LF__SN_/S4B_PH_SM4_K_TB_LF__SN_"
export { SKRPACE010 } from "./SKRPACE010/SKRPACE010"
export { SN74LVC1G08DBVR } from "./SN74LVC1G08DBVR/SN74LVC1G08DBVR"
export { LTST_C190KGKT } from "./LTST_C190KGKT/LTST_C190KGKT"