0hmX/simplified-am62l-computer

This code defines components and scripts for physically representing and routing high-speed DDR memory signals, power lines, and ground planes on an 8-layer PCB with detailed pin assignments, copper pours, and precise via and trace layouts based on TI EVM reference data.

Version
1.0.16
License
unset
Stars
0

imports/CL03A105KQ3CSNC.tsx

import type { CapacitorProps } from "@tscircuit/props"

/** Exact JLC C318541 copper with a compact 0201 assembly courtyard. */
export const CL03A105KQ3CSNC = (
  props: Omit<CapacitorProps, "capacitance">,
) => (
  <capacitor
    capacitance="1uF"
    supplierPartNumbers={{ jlcpcb: ["C318541"] }}
    manufacturerPartNumber="CL03A105KQ3CSNC"
    footprint={
      <footprint>
        <smtpad portHints={["pin2"]} pcbX="0.27432mm" pcbY="0mm"
          width="0.368427mm" height="0.3240024mm" shape="rect" />
        <smtpad portHints={["pin1"]} pcbX="-0.27432mm" pcbY="0mm"
          width="0.368427mm" height="0.3240024mm" shape="rect" />
        <courtyardoutline outline={[
          { x: -0.55, y: -0.35 },
          { x: 0.55, y: -0.35 },
          { x: 0.55, y: 0.35 },
          { x: -0.55, y: 0.35 },
        ]} />
      </footprint>
    }
    cadModel={{
      objUrl: "https://modelcdn.tscircuit.com/easyeda_models/assets/C318541.obj?uuid=c3e75c3d90204c70b153866ab54c789f",
      stepUrl: "https://modelcdn.tscircuit.com/easyeda_models/assets/C318541.step?uuid=c3e75c3d90204c70b153866ab54c789f",
      pcbRotationOffset: 0,
      modelOriginPosition: { x: 0, y: -0.000012700000070253736, z: -0.15 },
    }}
    {...props}
  />
)