0hmX/am3352-ddr-track-b-byte0-wip-20261007

saved-byte0.tsx

import { SavedDqRouting } from "./saved-dq"
import dataPaths from "./contracts/byte0-data-matched-l6-paths.json"
import strobePaths from "./contracts/byte0-retuned-strobe-paths.json"

export const savedByte0Nets = new Set([...dataPaths, ...strobePaths].map(path => path.net))

// Core's bus DRC measures XY only. Check each same-layer group here; the
// cross-group active-via-corrected geometry is independently audited.
export function SavedByte0Routing() {
  return <>
    <SavedDqRouting paths={dataPaths} />
    <SavedDqRouting paths={strobePaths} traceWidth={0.134874} />
    <bus name="SAVED_BYTE0_DATA9" connections={dataPaths.map(path => `SAVED_${path.net}`)}
      maxLengthSkew={0.635} pcbTraceWidth={0.170688} pcbAllowedLayers={["inner5"]} />
    <bus name="SAVED_BYTE0_DQS" connections={strobePaths.map(path => `SAVED_${path.net}`)}
      maxLengthSkew={0.127} pcbTraceWidth={0.134874} pcbAllowedLayers={["inner2"]} />
  </>
}