0hmX/am3352-ddr-track-b-byte0-wip-20261007

Partial full-board preview: 11 of 47 DDR signal nets routed; power and interfaces incomplete. Fabrication and electrical release blocked.

Version: 0.0.1
License: unset
Stars: 0

contracts/byte0-support-overrides.json

{
  "C_SOC_DDR_5": {
    "pcbX": -16.5,
    "pcbY": 8.0
  },
  "C_SOC_DDR_15": {
    "pcbX": -17.3,
    "pcbY": 9.7
  },
  "C_RAM_11": {
    "pcbX": -16.5,
    "pcbY": -7.0
  },
  "C_RAM_3": {
    "pcbX": -17.9,
    "pcbY": -11.4
  },
  "C_RAM_4": {
    "pcbX": -15.5,
    "pcbY": -10.7
  },
  "C_RAM_10": {
    "pcbX": -17.9,
    "pcbY": -7.4
  }
}