tscircuit/ti

lib/chips/spice-models/TPS7A02-spice-model.json

{
  "source": "*\r\n*  TPS7A0x Model\r\n*****************************************************************************\r\n*  (C) Copyright 2019 Texas Instruments Incorporated. All rights reserved.\r\n*****************************************************************************\r\n** This model is designed as an aid for customers of Texas Instruments.\r\n** TI and its licensors and suppliers make no warrenties, either expressed\r\n** or implied, with respect to this model, including the warranties of \r\n** merchantability or fitness for a particular purpose.  The model is\r\n** provided solely on an \"as is\" basis.  The entire risk as to its quality\r\n** and performance is with the customer\r\n*****************************************************************************\r\n*\r\n** Released by: WEBENCH(R) Design Center, Texas Instruments Inc.\r\n* Part: TPS7A0x\r\n* Date: 11/1/2019\r\n* Model Type: TRANSIENT\r\n* Simulator: PSPICE\r\n* Simulator Version: 17.2\r\n* EVM Order Number: \r\n* EVM Users Guide: \r\n* Datasheet: SBVS277 - JULY 2019\r\n*\r\n* Model Version: Final 1.00\r\n*\r\n*****************************************************************************\r\n*\r\n* Updates:\r\n*\r\n* Final 1.00\r\n* Release to Web.\r\n*\r\n*****************************************************************************\r\n*\r\n* Model Usage Notes:\r\n* \r\n* 1. Input and quiescent current of the part have not been modeled.\r\n* 2. Temperature effects have not been modeled.\r\n* 3. Noise has not been modeled. The bypass capacitor has no effect.\r\n*\r\n*****************************************************************************\r\n* source LDO_Create.php - TPS7A0x\r\n*$\n* TPS7A02_03\n*****************************************************************************\n* (C) Copyright 2019 Texas Instruments Incorporated. All rights reserved.   \n*****************************************************************************\n** This model is designed as an aid for customers of Texas Instruments.\n** TI and its licensors and suppliers make no warranties, either expressed\n** or implied, with respect to this model, including the warranties of\n** merchantability or fitness for a particular purpose.  The model is\n** provided solely on an \"as is\" basis.  The entire risk as to its quality\n** and performance is with the customer\n*****************************************************************************\n*\n* This model is subject to change without notice. Texas Instruments\n* Incorporated is not responsible for updating this model.\n*\n*****************************************************************************\n*\n* Released by: Texas Instruments Inc.\n* Part: TPS7A02_03\n* Date: 11/02/2019\n* Model Type:  TRANSIENT\n* Simulator: PSpice\n* Simulator Version: 17.2\n* Datasheet: SBVS277A –JULY 2019–REVISED DECEMBER 2019\n*\n* Model Version: 1.00\n*\n*****************************************************************************\n.SUBCKT TPS7A02_03 VIN EN GND VOUT NC\nX1  VOUT GND VIN VIN EN FBK_INT  LDO_BASIC \n+ PARAMS: \n+ rinp = 1.000e+7 \n+ rout = 4.9m \n+ psrr = 1.78m \n+ pole = 100 \n+ zero = 2000 \n+ venb = 1.1 \n+ ehys = 0.1 \n+ uvlo = 1.3 \n+ uhys = 0.18 \n+ vref = 0.8 \n+ drop = 0.535 \n+ ilim = 4.500e-1 \n+ ttrn = 350e-6 \nR1  VOUT FBK_INT  8.770MEG \nR2\tFBK_INT GND\t{8.77Meg/((V_out/0.8)-1)} \nR6  NC GND 10MEG  \n.ENDS TPS7A02_03 \n*$\n.SUBCKT ldo_basic out vgnd vin bias enb fbk \r\n+ PARAMS: \r\n+ rinp = 1e07 \r\n+ rout = 0.1\r\n+ psrr = 5e-4\r\n+ pole = 100\r\n+ zero = 10e3\r\n+ venb = 1.0\r\n+ ehys = 0.1\r\n+ uvlo = 2.0\r\n+ uhys = 0.1\r\n+ vref = 1.20\r\n+ drop = 0.25\r\n+ ilim = 0.10\r\n+ ttrn = 1e-4\r\nR00 vin vxx  { rinp } \r\nC00 vin vxx  { 1/(6.28*rinp*pole) } \r\nEX1 vx1   0 VALUE {IF(V(enb, vgnd) + V(egd)*ehys > venb, 1, 0)}\r\nRX1 vx1 egd 10\r\nCX1 egd   0 1n\r\nEX2 vx2   0 VALUE {IF(V(bias, vgnd) + V(vgd)*uhys > uvlo, 1, 0)}\r\nRX2 vx2 vgd 10\r\nCX2 vgd   0 1n\r\nE01 v01 vgnd VALUE { \r\n+ IF(V(egd)>0.51&V(vgd)>0.51, { vref }, 0) }\r\nR01 v01 ref {3.333e5*SQRT(ttrn)}\r\nC01 ref vgnd {1e-6*SQRT(ttrn)}\r\nE02 v02   0  VALUE {\r\n+ V(ref)*(ABS(V(out)) + 1E-6)/(ABS(V(fbk)) + 1E-6) }\r\nR02 v02 des 10\r\nC02 des   0 1n\r\nE03 drv   0 VALUE {\r\n+ MIN(V(des), MAX(V(vin)-drop, 0))}\r\nR03 drv vxx { psrr*rinp } \r\nC03 drv vxx { 1/(6.28*psrr*rinp*zero) } \r\nE04 vyy   0  VALUE { \r\n+ MIN(V(vxx), V(vzz) + ilim*rout) }\r\nR04 vyy vzz { rout }\r\nF04 vin vyy V04 1\r\nV04 vzz out 0V\r\n.ENDS ldo_basic\r\n*$\n"
}