tscircuit/ti
ti tscircuit library
- Version
- 1.0.85
- License
- unset
- Stars
- 0
dist/lib/chips/TPS63802/circuit.json
PCB
Schematic
[
{
"type": "source_group",
"source_group_id": "source_group_0",
"is_subcircuit": true,
"was_automatically_named": true,
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_0",
"name": "EN",
"pin_number": 1,
"port_hints": [
"EN",
"pin1",
"1"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_1",
"name": "MODE",
"pin_number": 2,
"port_hints": [
"MODE",
"pin2",
"2"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_2",
"name": "AGND",
"pin_number": 3,
"port_hints": [
"AGND",
"pin3",
"3"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_3",
"name": "FB",
"pin_number": 4,
"port_hints": [
"FB",
"pin4",
"4"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_4",
"name": "PG",
"pin_number": 5,
"port_hints": [
"PG",
"pin5",
"5"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_5",
"name": "VOUT",
"pin_number": 6,
"port_hints": [
"VOUT",
"pin6",
"6"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_6",
"name": "L2",
"pin_number": 7,
"port_hints": [
"L2",
"pin7",
"7"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_7",
"name": "GND",
"pin_number": 8,
"port_hints": [
"GND",
"pin8",
"8"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_8",
"name": "L1",
"pin_number": 9,
"port_hints": [
"L1",
"pin9",
"9"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_port",
"source_port_id": "source_port_9",
"name": "VIN",
"pin_number": 10,
"port_hints": [
"VIN",
"pin10",
"10"
],
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0"
},
{
"type": "source_component",
"source_component_id": "source_component_0",
"ftype": "simple_chip",
"name": "unnamed_chip1",
"supplier_part_numbers": {},
"source_group_id": "source_group_0"
},
{
"type": "simulation_spice_subcircuit",
"simulation_spice_subcircuit_id": "simulation_spice_subcircuit_0",
"source_component_id": "source_component_0",
"spice_pin_to_source_port_map": {
"AGND": "source_port_2",
"EN": "source_port_0",
"FB": "source_port_3",
"GND": "source_port_7",
"L1": "source_port_8",
"L2": "source_port_6",
"MODE": "source_port_1",
"PG": "source_port_4",
"VIN": "source_port_9",
"VOUT": "source_port_5"
},
"subcircuit_source": "*$\n* TPS63802\n*****************************************************************************\n* (C) Copyright 2018 Texas Instruments Incorporated. All rights reserved. \n*****************************************************************************\n** This model is designed as an aid for customers of Texas Instruments.\n** TI and its licensors and suppliers make no warranties, either expressed\n** or implied, with respect to this model, including the warranties of \n** merchantability or fitness for a particular purpose. The model is\n** provided solely on an \"as is\" basis. The entire risk as to its quality\n** and performance is with the customer\n*****************************************************************************\n*\n* This model is subject to change without notice. Texas Instruments\n* Incorporated is not responsible for updating this model.\n*\n*****************************************************************************\n*\n** Released by: Texas Instruments Inc.\n* Part: TPS63802\n* Date: 03APR2019\n* Model Type: TRANSIENT\n* Simulator: PSPICE\n* Simulator Version: 16.2.0.p001\n* EVM Order Number: NA\n* EVM Users Guide: NA\n* Datasheet: SLVSEU9A –NOVEMBER 2018–REVISED JANUARY 2019\n* Topologies Supported: Buck, Boost, Buck Boost\n*\n* Model Version: Final 1.00\n*\n*****************************************************************************\n*\n* Updates:\n*\n* Final 1.00\n* Release to Web.\n*\n*****************************************************************************\n*\n* Model Usage Notes:\n*\n* 1. The following features have been modeled\n* a. Switching Characteristics\n* b. FPWM and PFM Mode\n* c. Minimum ON time\n* d. Soft Start\n* e. Auto Mode transitions\n* f. Current Limit\n* g. Power Good\n* h. Input Voltage Protection(IVP)\n* i. Output Voltage Protection(OVP)\n* j. Input Voltage and Enable UVLO\n* 2. The following features have not been modeled\n* a. Temperature effects \n* b. Quiescent curents\n* 3. Ground pins have been tied to 0V internally. \n* Therefore, this model cannot be used for inverting topologies.\n*\n*****************************************************************************\n.SUBCKT TPS63802_TRANS AGND EN FB GND L1 L2 MODE PG VIN VOUT \nX_U1 NO_FAULT NO_FAULT SDWN AND2_BASIC_GEN PARAMS: VDD=1 VSS=0\n+ VTHRESH=500E-3\nC_U_EA_C2 COMP 0 150f \nD_U_EA_D2 COMP U_EA_N05897 D_D1 \nR_U_EA_R2 0 U_EA_VREF_FEED 1k \nE_U_EA_ABM1 U_EA_VREF_INT 0 VALUE { MIN(V(U_EA_SS), V(U_EA_BANDGAP)) \n+ }\nG_U_EA_ABMII1 U_EA_N00231 U_EA_SS VALUE { If(V(SDWN_B) < 0.5, 1.9u,0) \n+ }\nV_U_EA_V6 U_EA_N76869 0 20m\nE_U_EA_ABM3 U_EA_N05897 0 VALUE { IF(V(BUCK)>0.5, \n+ {((1.911-1.175)/(0.5))*V(U_EA_VREF)+1.175}, \n+ {((2.176-1.175)/(0.5))*V(U_EA_VREF)+1.175}) }\nX_U_EA_U1 SKIPPAUSE SKIPPAUSE_BAR INV_BASIC_GEN PARAMS: VDD=1 VSS=0\n+ VTHRESH=500E-3\nD_U_EA_D3 U_EA_N43040 COMP D_D1 \nC_U_EA_C1 U_EA_SS 0 {1.9u*100u/0.5} IC=0\nV_U_EA_V3 U_EA_N16768328 0 0.075\nE_U_EA_ABM16 U_EA_SSEND 0 VALUE { IF(V(U_EA_SS) > 0.5, 1, 0) }\nV_U_EA_V5 U_EA_N76861 0 {1.175+20m}\nX_U_EA_U3 COMP U_EA_N76861 U_EA_N76869 U_EA_N76909 COMPHYS_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nC_U_EA_C4 U_EA_VREF_FEED U_EA_N16768288 {0.15n} \nX_U_EA_U5 FPWM PFM_MODE INV_BASIC_GEN PARAMS: VDD=1 VSS=0\n+ VTHRESH=500E-3\nR_U_EA_R1 COMP U_EA_N04642 350k TC=0,0 \nE_U_EA_E1 U_EA_VREF U_EA_N16768276 U_EA_VREF_INT 0 1\nV_U_EA_V1 U_EA_N00231 0 0.6\nC_U_EA_C3 U_EA_N04642 0 20p \nD_U_EA_D1 U_EA_SS U_EA_N00231 D_D1 \nD_U_EA_D64 0 U_EA_VREF_FEED D_D1 \nX_U_EA_U8 U_EA_N114925 SKIPPAUSE BUF_DELAY_BASIC_GEN PARAMS: VDD=1\n+ VSS=0 VTHRESH=0.5 DELAY=20n\nR_U_EA_Rea COMP 0 500Meg TC=0,0 \nX_U_EA_U6 PFM_MODE U_EA_SKIPPAUSE_PRE U_EA_N114925 AND2_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_EA_U9 U_EA_SSEND PG_LOGIC_OUT MODE_HIGH FPWM AND3_BASIC_GEN PARAMS:\n+ VDD=1 VSS=0 VTHRESH=500E-3\nD_U_EA_D65 U_EA_VREF_FEED U_EA_N16768328 D_D1 \nG_U_EA_ABM2I1 U_EA_VREF COMP VALUE { LIMIT( (V(U_EA_VREF)-V(FB))* 20u,\n+ 1.5u, -1.5u) }\nX_U_EA_S1 SDWN_B 0 U_EA_SS 0 EA_SS_mod_U_EA_S1 \nE_U_EA_ABM5 U_EA_N16768276 0 VALUE { IF(V(U_EA_SS) >0.45\n+ ,V(U_EA_VREF_FEED),0) }\nX_U_EA_U4 U_EA_N76909 U_EA_SKIPPAUSE_PRE INV_BASIC_GEN PARAMS: VDD=1\n+ VSS=0 VTHRESH=500E-3\nV_U_EA_V2 U_EA_BANDGAP 0 0.5\nE_U_EA_ABM17 U_EA_N43040 0 VALUE { If (V(FPWM) > 0.5, 594m, 1.12) }\nE_U_EA_E2 U_EA_N16768288 0 VIN 0 0.5\nE_U_GMI_ABM1 U_GMI_CL_LIMIT 0 VALUE { IF(V(BUCK) > 0.5, 3.5, 4.5) }\nC_U_GMI_C147 GND U_GMI_N16771084 1.443n IC=0 \nX_U_GMI_U831 PWM_RESET U_GMI_N16850824 one_shot PARAMS: T=20\nX_U_GMI_U833 INDUCTOR_COMP_OUT U_GMI_BLNCK U_GMI_XX AND2_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nD_U_GMI_D11 U_GMI_N16771134 U_GMI_N16771084 D_D1 \nR_U_GMI_R3 U_GMI_N16771134 U_GMI_N16771084 40 TC=0,0 \nE_U_GMI_ABM152 U_GMI_ISWF 0 VALUE { {IF(V(U_GMI_BLNCK) > 0.5, \n+ V(ISENSE), -2)} }\nX_U_GMI_U3 ISENSE U_GMI_ICTRL INDUCTOR_COMP_OUT COMP_BASIC_GEN PARAMS:\n+ VDD=1 VSS=0 VTHRESH=0.5\nR_U_GMI_R255 U_GMI_N16949901 U_GMI_BLNCK 20 \nE_U_GMI_ABM3 U_GMI_N16949901 0 VALUE { If(V(BUCK) >\n+ 0.5,V(PRE_HDRV1),V(PRE_LDRV2)) }\nD_U_GMI_D58 U_GMI_BLNCK U_GMI_N16949901 D_D1 \nX_U_GMI_U1 U_GMI_ISWF U_GMI_ICTRL PWM_RESET COMP_BASIC_GEN PARAMS:\n+ VDD=1 VSS=0 VTHRESH=0.5\nX_U_GMI_U841 B1 U_GMI_N16985147 INV_BASIC_GEN PARAMS: VDD=1 VSS=0\n+ VTHRESH=500E-3\nE_U_GMI_ABM153 U_GMI_ICTRL 0 VALUE { LIMIT(((V(COMP)-0.987) * 3.7878),\n+ -1, V(U_GMI_CL_LIMIT)) }\nC_U_GMI_C146 GND U_GMI_BLNCK 1.443n IC=0 \nX_U_GMI_U840 BUCK U_GMI_N16985147 U_GMI_BUCK_RESET AND2_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_GMI_U824 PWM_INT U_GMI_N16771188 INV_DELAY_BASIC_GEN PARAMS: VDD=1\n+ VSS=0 VTHRESH=0.5 DELAY=10n\nX_U_GMI_U702 PWM_RESET U_GMI_N16850824 PWM_RESET_20N_SHOT OR2_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_GMI_U2 PWM_START PWM_RESET_20N_SHOT PWM_INT N16829483\n+ srlatchrhp_basic_gen PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nX_U_GMI_U825 U_GMI_N16771188 PWM_INT U_GMI_N16771134 AND2_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_GMI_U842 U_GMI_BUCK_RESET PWM_INT U_GMI_N16771084 PWM OR3_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_PG_U6 VIN U_PG_N16768007 U_PG_N16768069 IVP COMPHYS_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nX_U_PG_U9 U_PG_PG_FB U_PG_N16773421 INV_BASIC_GEN PARAMS: VDD=1 VSS=0\n+ VTHRESH=500E-3\nX_U_PG_S1 U_PG_PGBAR_DELAY GND PG GND PG_OVP_U_PG_S1 \nV_U_PG_V6 U_PG_N16768069 GND 150m\nX_U_PG_U14 U_PG_N16773421 U_PG_N16813847 asymmetric_delay PARAMS:\n+ RISING_EDGE_DELAY=100n VTHRESH=0.5 FALLING_EDGE_DELAY=40u VDD=1 VSS=0\nV_U_PG_V3 U_PG_N00552 GND {0.05*0.5}\nX_U_PG_U3 VOUT U_PG_N00172 U_PG_N16765851 OVP COMPHYS_BASIC_GEN PARAMS:\n+ VDD=1 VSS=0 VTHRESH=0.5\nX_U_PG_U2 FB U_PG_N00464 U_PG_N00552 U_PG_PG_FB COMPHYS_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nV_U_PG_V1 U_PG_N00172 GND 5.7\nX_U_PG_U10 U_PG_N16813847 OVP_VOUT_DISCH IVP_ACT U_PG_N16815252\n+ OR3_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nV_U_PG_V5 U_PG_N16768007 GND 5.7\nX_U_PG_U11 U_PG_PGBAR_DELAY PG_LOGIC_OUT INV_BASIC_GEN PARAMS: VDD=1\n+ VSS=0 VTHRESH=500E-3\nX_U_PG_U13 U_PG_N16815252 VIN_OK U_PG_PGBAR_DELAY AND2_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nV_U_PG_V4 U_PG_N16765851 GND 150m\nV_U_PG_V2 U_PG_N00464 GND {0.95*0.5}\nX_U_OFFtimer_U779 U_OFFtimer_BB_EXIT_BUCK_SHOT U_OFFtimer_N16909203\n+ U_OFFtimer_N16909110 U_OFFtimer_N18102460 PWM_TRIGGER OR4_BASIC_GEN PARAMS:\n+ VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U866 IVP U_OFFtimer_ZCDB IVP_ACT AND2_BASIC_GEN PARAMS:\n+ VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_S34 U_OFFtimer_N16909053 GND U_OFFtimer_TONBY2 GND\n+ OFF_Timer_mod_U_OFFtimer_S34 \nR_U_OFFtimer_R261 DISCH3_SOME U_OFFtimer_N16910216 12 \nX_U_OFFtimer_U18 U_OFFtimer_N16907967 U_OFFtimer_QA\n+ U_OFFtimer_N16909153 XNOR2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U777 U_OFFtimer_N18027008 N17677210 SKIPPAUSE_BAR\n+ U_OFFtimer_BLOCK_ON SRLATCHSHP_BASIC_NEW PARAMS: IC=1 THRESH=0.5 VDD=1 VSS=0\nV_U_OFFtimer_V19 U_OFFtimer_N18741338 GND 1Vdc\nX_U_OFFtimer_U692 U_OFFtimer_DISCH6_SOME U_OFFtimer_PWM_RESET_SHOT\n+ U_OFFtimer_DISCH4_SOME U_OFFtimer_N16908876 OR3_BASIC_GEN PARAMS: VDD=1 VSS=0\n+ VTHRESH=500E-3\nV_U_OFFtimer_V15 U_OFFtimer_N16907724 GND 10Vdc\nX_U_OFFtimer_U45 PWM U_OFFtimer_N16908893 BB_ENTRY_BOOST AND2_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U660 BB_MODE U_OFFtimer_BOON PWM_RESET\n+ U_OFFtimer_N16907504 AND3_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nD_U_OFFtimer_D60 U_OFFtimer_N16910657 U_OFFtimer_N16910665 D_D1 \nC_U_OFFtimer_C1782 GND U_OFFtimer_TOFF_50NS {100u*50n/1} \nV_U_OFFtimer_V9 U_OFFtimer_N16907349 GND 1\nX_U_OFFtimer_U684 U_OFFtimer_TIMER_EXPIRES_INT5 U_OFFtimer_N16907358\n+ U_OFFtimer_DISCH5_SOME N16907366 srlatchrhp_basic_gen PARAMS: VDD=1 VSS=0\n+ VTHRESH=0.5\nX_U_OFFtimer_U772 IVP U_OFFtimer_N19422688 INV_BASIC_GEN PARAMS: VDD=1\n+ VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U677 U_OFFtimer_TONBY3 U_OFFtimer_N16910385\n+ U_OFFtimer_N16910371 COMP_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nX_U_OFFtimer_U681 U_OFFtimer_TONBY4 U_OFFtimer_N16907460\n+ U_OFFtimer_N16907448 COMP_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nX_U_OFFtimer_U691 U_OFFtimer_SET_BB_EXIT_BUCK U_OFFtimer_N16910125\n+ U_OFFtimer_N17517103 N16910115 srlatchrhp_basic_gen PARAMS: VDD=1 VSS=0\n+ VTHRESH=0.5\nX_U_OFFtimer_U674 U_OFFtimer_N18427252 BB_MODE TONMAX N18432614\n+ srlatchrhp_basic_gen PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nX_U_OFFtimer_U675 PWM U_OFFtimer_PWM_BAR INV_DELAY_BASIC_GEN PARAMS:\n+ VDD=1 VSS=0 VTHRESH=0.5 DELAY=2n\nV_U_OFFtimer_V1 U_OFFtimer_1VDC GND 1\nG_U_OFFtimer_ABMII1 U_OFFtimer_N16907229 U_OFFtimer_TONBY2 VALUE {\n+ MAX(0, {V(U_OFFtimer_N16907243)/1.25e3}) }\nX_U_OFFtimer_U833 ZCD ZCD ZCD PWM U_OFFtimer_N18242117 AND4_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nE_U_OFFtimer_ABM154 U_OFFtimer_N16910385 0 VALUE { MAX(V(VIN)*0.2,1m) \n+ }\nX_U_OFFtimer_S37 U_OFFtimer_N16907236 GND U_OFFtimer_TONBY4 GND\n+ OFF_Timer_mod_U_OFFtimer_S37 \nX_U_OFFtimer_U694 U_OFFtimer_N16910382 U_OFFtimer_BOCOM\n+ BUF_DELAY_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY=10n\nX_U_OFFtimer_U658 U_OFFtimer_N16910232 U_OFFtimer_BOON\n+ BUF_DELAY_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY=10n\nX_U_OFFtimer_U687 U_OFFtimer_N18769058 U_OFFtimer_N19119380\n+ U_OFFtimer_N18756756 N18787013 srlatchrhp_basic_gen PARAMS: VDD=1 VSS=0\n+ VTHRESH=0.5\nV_U_OFFtimer_V8 U_OFFtimer_N16907313 GND 1\nX_U_OFFtimer_S35 U_OFFtimer_N16910239 GND U_OFFtimer_TONBY3 GND\n+ OFF_Timer_mod_U_OFFtimer_S35 \nX_U_OFFtimer_U690 U_OFFtimer_N16908876 BB_MODE U_OFFtimer_N16910034\n+ AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U781 ZCD U_OFFtimer_ZCDB INV_BASIC_GEN PARAMS: VDD=1 VSS=0\n+ VTHRESH=500E-3\nX_U_OFFtimer_U857 PWM_RESET_20N_SHOT U_OFFtimer_BUCK_B SKIPPAUSE\n+ U_OFFtimer_N19286930 AND3_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U737 U_OFFtimer_N16911021 U_OFFtimer_LATCH_OUT_DEL\n+ BUF_DELAY_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY=10n\nX_U_OFFtimer_U35 BB_LDRV2 U_OFFtimer_COM_PHASE U_OFFtimer_N16910818\n+ OR2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U837 U_OFFtimer_N18400174 VI_GR_VO_NEW\n+ U_OFFtimer_N18401083 OR2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U659 U_OFFtimer_N16910256 U_OFFtimer_BUOF\n+ BUF_DELAY_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY=10n\nG_U_OFFtimer_ABM2I1 U_OFFtimer_N16907724 U_OFFtimer_TONBY3 VALUE {\n+ IF(V(U_OFFtimer_N16910455) < 0.5, {(V(U_OFFtimer_N16910235)/2.5e3)+0.2m}, \n+ {V(U_OFFtimer_N16910235)/100e6} ) }\nX_U_OFFtimer_S43 U_OFFtimer_N16909604 GND U_OFFtimer_TONBY6 GND\n+ OFF_Timer_mod_U_OFFtimer_S43 \nE_U_OFFtimer_E20 U_OFFtimer_N16907243 GND L1 GND 1\nX_U_OFFtimer_S42 U_OFFtimer_BUOF GND U_OFFtimer_N16907399 U_OFFtimer_TONBY4\n+ OFF_Timer_mod_U_OFFtimer_S42 \nX_U_OFFtimer_U41 PWM PWM U_OFFtimer_N16910455 OR2_BASIC_GEN PARAMS:\n+ VDD=1 VSS=0 VTHRESH=500E-3\nE_U_OFFtimer_ABM155 U_OFFtimer_N16907460 0 VALUE { MAX(V(VIN)*0.2,1m) \n+ }\nR_U_OFFtimer_R267 DISCH2_SOME U_OFFtimer_N16908693 10 \nX_U_OFFtimer_U672 U_OFFtimer_TONBY2 U_OFFtimer_N16910548 B1\n+ COMP_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nI_U_OFFtimer_I3 GND U_OFFtimer_TONBY4 DC 0.2m \nX_U_OFFtimer_U859 U_OFFtimer_N19329286 U_OFFtimer_PRE_LDRV1_5NS\n+ one_shot PARAMS: T=5 \nX_U_OFFtimer_U682 U_OFFtimer_N16907448 U_OFFtimer_N16907388\n+ U_OFFtimer_DISCH4_SOME N16907473 srlatchrhp_basic_gen PARAMS: VDD=1 VSS=0\n+ VTHRESH=0.5\nX_U_OFFtimer_U865 OVP U_OFFtimer_ZCDB OVP_VOUT_DISCH AND2_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nC_U_OFFtimer_C184 GND U_OFFtimer_N16907358 1.443n IC=0 \nC_U_OFFtimer_C185 GND U_OFFtimer_N16907529 1.443n IC=0 \nE_U_OFFtimer_ABM16 U_OFFtimer_N16909110 0 VALUE { If\n+ (V(U_OFFtimer_N16909108) > 0.5, V(DISCH3_SOME), 0) }\nI_U_OFFtimer_I5 GND U_OFFtimer_TONBY6 DC 0.2m \nC_U_OFFtimer_C192 U_OFFtimer_N16908795 GND 1.443n IC=0 \nX_U_OFFtimer_U689 U_OFFtimer_N16907604 U_OFFtimer_N16907529\n+ U_OFFtimer_DISCH6_SOME N16907623 srlatchrhp_basic_gen PARAMS: VDD=1 VSS=0\n+ VTHRESH=0.5\nC_U_OFFtimer_C174 GND U_OFFtimer_N16909150 1.443n \nX_U_OFFtimer_U683 U_OFFtimer_TSBY5 U_OFFtimer_N16907313\n+ U_OFFtimer_TIMER_EXPIRES_INT5 COMP_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nX_U_OFFtimer_U663 U_OFFtimer_SET_BB_ENTRY_BOOST U_OFFtimer_N16910101\n+ U_OFFtimer_N16908893 N16907607 srlatchrhp_basic_gen PARAMS: VDD=1 VSS=0\n+ VTHRESH=0.5\nR_U_OFFtimer_R256 PWM_TRIGGER U_OFFtimer_N16909150 5 \nX_U_OFFtimer_U852 U_OFFtimer_ZCDB U_OFFtimer_BUCK_50NS_OFF\n+ U_OFFtimer_N17756284 U_OFFtimer_N17757183 OR3_BASIC_GEN PARAMS: VDD=1 VSS=0\n+ VTHRESH=500E-3\nX_U_OFFtimer_U42 U_OFFtimer_BOCOM U_OFFtimer_N16907157\n+ U_OFFtimer_N16907227 AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U853 U_OFFtimer_DISCH5_SOME U_OFFtimer_BB_RST\n+ U_OFFtimer_N16907775 OR2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nV_U_OFFtimer_V20 U_OFFtimer_N18753455 GND 5Vdc\nX_U_OFFtimer_U838 BB_REGION U_OFFtimer_N18242113 U_OFFtimer_N19365948\n+ AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nC_U_OFFtimer_C182 U_OFFtimer_TONBY4 GND 1n IC=0 \nX_U_OFFtimer_U847 U_OFFtimer_N18795888 U_OFFtimer_BUCK_50NS_OFF\n+ one_shot PARAMS: T=10 \nX_U_OFFtimer_U861 PFM_MODE PRE_LDRV1 U_OFFtimer_N19329286\n+ AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U754 U_OFFtimer_N16907227 U_OFFtimer_N17517103\n+ U_OFFtimer_N17517103 BB_EXIT_BUCK AND3_BASIC_GEN PARAMS: VDD=1 VSS=0\n+ VTHRESH=500E-3\nD_U_OFFtimer_D12 U_OFFtimer_N18242113 U_OFFtimer_N18242117 D_D1 \nX_U_OFFtimer_U761 OVP_VOUT_DISCH U_OFFtimer_N19571072 one_shot PARAMS: \n+ T=20 \nX_U_OFFtimer_U762 DISCH2_SOME U_OFFtimer_BUCK_B SDWN_B\n+ U_OFFtimer_N17748054 OR3_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U21 U_OFFtimer_QB_BAR U_OFFtimer_QA U_OFFtimer_N16910355\n+ AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U856 U_OFFtimer_PWM_RESET_SHOT U_OFFtimer_N19165400\n+ U_OFFtimer_BB_RST U_OFFtimer_DISCH6_SOME U_OFFtimer_N16909604 OR4_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U673 B1 U_OFFtimer_PWM_BAR DISCH1_SOME N16910561\n+ srlatchrhp_basic_gen PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nX_U_OFFtimer_U735 U_OFFtimer_N16910625 BB_MODE INDUCTOR_COMP_OUT\n+ U_OFFtimer_N19372792 AND3_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U734 U_OFFtimer_LATCH_OUT_DEL BOOST U_OFFtimer_PWM_BAR\n+ U_OFFtimer_SET_BB_ENTRY_BOOST AND3_BASIC_GEN PARAMS: VDD=1 VSS=0\n+ VTHRESH=500E-3\nX_U_OFFtimer_U854 U_OFFtimer_BUCK_B U_OFFtimer_ZCDB\n+ U_OFFtimer_N19119380 OR2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nE_U_OFFtimer_E17 U_OFFtimer_N16910235 GND L2 GND 1\nX_U_OFFtimer_U24 U_OFFtimer_N16907178 BB_MODE U_OFFtimer_COM_PHASE\n+ AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nR_U_OFFtimer_R269 U_OFFtimer_N16997694 U_OFFtimer_N16908795 45 \nX_U_OFFtimer_U773 OVP U_OFFtimer_N19391435 INV_BASIC_GEN PARAMS: VDD=1\n+ VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U678 U_OFFtimer_N16910371 PWM_INT DISCH3_SOME N16910398\n+ srlatchrhp_basic_gen PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nX_U_OFFtimer_U653 BB_LDRV2 U_OFFtimer_BOON_BAR INV_BASIC_GEN PARAMS:\n+ VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U23 U_OFFtimer_QB U_OFFtimer_QA U_OFFtimer_N16910382\n+ AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nI_U_OFFtimer_I6 GND U_OFFtimer_N16922544 DC 0.2m \nR_U_OFFtimer_R2591 U_OFFtimer_N18242117 U_OFFtimer_N18242113 1.3k \nX_U_OFFtimer_U759 BB_EXIT_BUCK U_OFFtimer_BB_EXIT_BUCK_SHOT one_shot\n+ PARAMS: T=20 \nX_U_OFFtimer_U656 U_OFFtimer_N16910847 BB_LDRV2 BB_HDRV2 N16910850\n+ srlatchrhp_basic_gen PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nC_U_OFFtimer_C190 U_OFFtimer_N16908693 GND 1.443n IC=0 \nX_U_OFFtimer_U851 U_OFFtimer_ZCDB U_OFFtimer_BUCK_50NS_OFF\n+ U_OFFtimer_N17748054 U_OFFtimer_N16909053 OR3_BASIC_GEN PARAMS: VDD=1 VSS=0\n+ VTHRESH=500E-3\nX_U_OFFtimer_U667 U_OFFtimer_QA_BAR U_OFFtimer_N16908368\n+ BUF_DELAY_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY=20n\nX_U_OFFtimer_U751 U_OFFtimer_BOON_TERMINATION BB_MODE\n+ U_OFFtimer_N18125644 AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nV_U_OFFtimer_V10 U_OFFtimer_N16907383 GND 10\nC_U_OFFtimer_C1781 U_OFFtimer_N18242113 GND 1.443n IC=0 \nX_U_OFFtimer_S44 PWM GND U_OFFtimer_N16907383 U_OFFtimer_TONBY6\n+ OFF_Timer_mod_U_OFFtimer_S44 \nV_U_OFFtimer_V5 U_OFFtimer_N16922570 GND 10\nE_U_OFFtimer_E14 U_OFFtimer_N16910548 GND VOUT GND 0.2\nX_U_OFFtimer_S31 PWM GND U_OFFtimer_N16922570 U_OFFtimer_N16922544\n+ OFF_Timer_mod_U_OFFtimer_S31 \nX_U_OFFtimer_U661 U_OFFtimer_PWM_RESET_SHOT U_OFFtimer_DISCH5_SOME\n+ U_OFFtimer_DISCH5_SOME U_OFFtimer_DISCH4_SOME TIMER_EXPIRES OR4_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U19 U_OFFtimer_N16908368 U_OFFtimer_1VDC\n+ U_OFFtimer_N16909090 XNOR2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U771 U_OFFtimer_N18027008 U_OFFtimer_ZCD_PFM INV_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U43 U_OFFtimer_BOCOM U_OFFtimer_N16907157\n+ INV_DELAY_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY=10n\nX_U_OFFtimer_U868 U_OFFtimer_N18125644 U_OFFtimer_N19571072\n+ U_OFFtimer_N19549984 U_OFFtimer_N18102460 OR3_BASIC_GEN PARAMS: VDD=1 VSS=0\n+ VTHRESH=500E-3\nX_U_OFFtimer_U775 U_OFFtimer_ZCDB BB_MODE_B U_OFFtimer_BB_RST\n+ OR2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U9 U_OFFtimer_QA U_OFFtimer_QA_BAR TIMER_EXPIRES\n+ U_OFFtimer_N16909090 U_OFFtimer_BB_RST DFF_R PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nG_U_OFFtimer_ABMII3 U_OFFtimer_N18753455 U_OFFtimer_TOFF_50NS VALUE {\n+ IF(V(U_OFFtimer_N18756756) > 0.5, 100u, 0) }\nX_U_OFFtimer_S33 U_OFFtimer_N17757183 GND U_OFFtimer_TSBY2 GND\n+ OFF_Timer_mod_U_OFFtimer_S33 \nC_U_OFFtimer_C179 U_OFFtimer_TONBY3 GND 1n IC=0 \nX_U_OFFtimer_U862 U_OFFtimer_N19365948 U_OFFtimer_N18427252\n+ BUF_DELAY_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY=20n\nX_U_OFFtimer_U699 BOOST_ENTRY BOOST U_OFFtimer_N16909108 OR2_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U12 U_OFFtimer_QB U_OFFtimer_QB_BAR TIMER_EXPIRES\n+ U_OFFtimer_N16909153 U_OFFtimer_BB_RST DFF_R PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nX_U_OFFtimer_U764 DISCH2_SOME U_OFFtimer_BUCK_B SDWN_B\n+ U_OFFtimer_N17756284 OR3_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U845 ZCD PWM_RESET_20N_SHOT U_OFFtimer_N18769058\n+ AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U686 U_OFFtimer_TOFF_50NS U_OFFtimer_N18741338\n+ U_OFFtimer_N18795888 COMP_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nC_U_OFFtimer_C178 GND U_OFFtimer_N16910657 1.443n IC=0 \nX_U_OFFtimer_S32 DISCH1_SOME GND U_OFFtimer_N16922544 U_OFFtimer_TSBY2\n+ OFF_Timer_mod_U_OFFtimer_S32 \nX_U_OFFtimer_U28 U_OFFtimer_N16910771 U_OFFtimer_N16910818\n+ U_OFFtimer_N16910876 AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nD_U_OFFtimer_D61 U_OFFtimer_TOFF_50NS U_OFFtimer_N18753455 D_D1 \nX_U_OFFtimer_U36 BB_LDRV1 U_OFFtimer_COM_PHASE U_OFFtimer_N16910889\n+ OR2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U30 U_OFFtimer_N16907504 U_OFFtimer_N16907535\n+ INV_DELAY_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY=20N\nR_U_OFFtimer_R255 U_OFFtimer_BOCOM U_OFFtimer_N16910625 20 \nX_U_OFFtimer_U693 U_OFFtimer_N16910355 U_OFFtimer_BUCOM\n+ BUF_DELAY_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY=10n\nX_U_OFFtimer_U652 U_OFFtimer_BOON BB_LDRV2 BUF_BASIC_GEN PARAMS: VDD=1\n+ VSS=0 VTHRESH=0.5\nX_U_OFFtimer_U836 BB_MODE VI_GR_VO_NEW VI_GR_VO_NEW\n+ U_OFFtimer_N16910101 OR3_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nE_U_OFFtimer_ABM15 U_OFFtimer_N16909203 0 VALUE { If (V(BUCK) > 0.5,\n+ V(U_OFFtimer_N16909355), 0) }\nR_U_OFFtimer_R259 U_OFFtimer_N16910665 U_OFFtimer_N16910657 245 \nX_U_OFFtimer_U40 U_OFFtimer_BOON U_OFFtimer_N16909242\n+ INV_DELAY_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY=10n\nV_U_OFFtimer_V16 U_OFFtimer_N16907229 GND 10Vdc\nX_U_OFFtimer_U664 PWM_INT U_OFFtimer_N18401083 U_OFFtimer_N16911021\n+ N16910725 srlatchrhp_basic_gen PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nD_U_OFFtimer_D58 U_OFFtimer_N16910625 U_OFFtimer_BOCOM D_D1 \nI_U_OFFtimer_I4 GND U_OFFtimer_TSBY5 DC 0.2m \nV_U_OFFtimer_V4 U_OFFtimer_VDC GND 5.8\nX_U_OFFtimer_U765 DISCH3_SOME U_OFFtimer_N17111743 U_OFFtimer_ZCDB\n+ U_OFFtimer_N16910239 OR3_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U855 U_OFFtimer_BOON U_OFFtimer_N19165400 INV_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U37 U_OFFtimer_BOON U_OFFtimer_N16909242\n+ U_OFFtimer_BOON_TERMINATION AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U668 U_OFFtimer_TSBY2 U_OFFtimer_N16910211\n+ U_OFFtimer_TIMER_EXPIRES_INT1 COMP_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nC_U_OFFtimer_C183 U_OFFtimer_TSBY5 GND 1n IC=0 \nX_U_OFFtimer_U651 U_OFFtimer_QB_BAR U_OFFtimer_N16907967\n+ BUF_DELAY_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY=20n\nX_U_OFFtimer_U665 U_OFFtimer_N16909150 PWM_START BUF_BASIC_GEN PARAMS:\n+ VDD=1 VSS=0 VTHRESH=0.5\nE_U_OFFtimer_E19 U_OFFtimer_N16907399 GND VOUT GND 1\nX_U_OFFtimer_S39 U_OFFtimer_N18756756 GND U_OFFtimer_TOFF_50NS GND\n+ OFF_Timer_mod_U_OFFtimer_S39 \nE_U_OFFtimer_ABM153 U_OFFtimer_N18400174 0 VALUE { IF(V(BB_REGION) <\n+ 0.5, 1, V(U_OFFtimer_N16908795)) }\nX_U_OFFtimer_U662 U_OFFtimer_N16910657 BOOST BB_EXIT_BOOST N16910663\n+ srlatchrhp_basic_gen PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nX_U_OFFtimer_U778 U_OFFtimer_PFM_MODE_ACT N17648959 SKIPPAUSE_BAR\n+ U_OFFtimer_N19290411 SRLATCHSHP_BASIC_NEW PARAMS: IC=0 THRESH=0.5 VDD=1 VSS=0\nC_U_OFFtimer_C180 GND U_OFFtimer_N16910216 1.443n IC=0 \nX_U_OFFtimer_S40 U_OFFtimer_TIMER_BB_START GND U_OFFtimer_N16907277\n+ U_OFFtimer_TSBY5 OFF_Timer_mod_U_OFFtimer_S40 \nC_U_OFFtimer_C175 U_OFFtimer_TSBY2 GND 1n IC=0 \nC_U_OFFtimer_C146 GND U_OFFtimer_N16910625 1.443n IC=0 \nC_U_OFFtimer_C186 U_OFFtimer_TONBY6 GND 1n IC=0 \nX_U_OFFtimer_U742 U_OFFtimer_DISCH4_SOME U_OFFtimer_BB_RST\n+ U_OFFtimer_N16907236 OR2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U666 U_OFFtimer_N16910034 U_OFFtimer_N16907775\n+ U_OFFtimer_TIMER_BB_START N16910144 srlatchrhp_basic_gen PARAMS: VDD=1 VSS=0\n+ VTHRESH=0.5\nD_U_OFFtimer_D59 U_OFFtimer_N16909150 PWM_TRIGGER D_D1 \nX_U_OFFtimer_U835 BUCK VO_GR_VI_NEW U_OFFtimer_N16910125 OR2_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nR_U_OFFtimer_R262 U_OFFtimer_DISCH4_SOME U_OFFtimer_N16907388 10 \nX_U_OFFtimer_U22 U_OFFtimer_QB U_OFFtimer_QA_BAR U_OFFtimer_N16910256\n+ AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U688 U_OFFtimer_TONBY6 U_OFFtimer_N16907349\n+ U_OFFtimer_N16907604 COMP_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nX_U_OFFtimer_U655 BB_LDRV1 U_OFFtimer_N16910771 INV_BASIC_GEN PARAMS:\n+ VDD=1 VSS=0 VTHRESH=500E-3\nV_U_OFFtimer_V6 U_OFFtimer_N16910211 GND 1\nC_U_OFFtimer_C181 GND U_OFFtimer_N16907388 1.443n IC=0 \nR_U_OFFtimer_R260 U_OFFtimer_DISCH5_SOME U_OFFtimer_N16907358 10 \nX_U_OFFtimer_U741 U_OFFtimer_DISCH5_SOME U_OFFtimer_BB_RST\n+ U_OFFtimer_N16907329 OR2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U763 BUCK U_OFFtimer_BUCK_B INV_BASIC_GEN PARAMS: VDD=1\n+ VSS=0 VTHRESH=500E-3\nE_U_OFFtimer_ABM158 U_OFFtimer_N19200499 0 VALUE {\n+ IF(V(U_OFFtimer_PRE_LDRV1_5NS) > 0.5 & V(BUCK) > 0.5 & V(IND_SENSE) < 700m,\n+ 1, 0) }\nX_U_OFFtimer_U768 DISCH2_SOME DISCH3_SOME U_OFFtimer_BOCOM\n+ U_OFFtimer_N17779772 OR3_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U780 VO_GR_VI_BOOST VO_GR_VI_BOOST ZCD U_OFFtimer_BOON\n+ U_OFFtimer_N16910665 AND4_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U760 IVP_ACT U_OFFtimer_N19549984 one_shot PARAMS: T=20 \nX_U_OFFtimer_U834 BB_REGION ZCD ZCD PWM_INT U_OFFtimer_N16997694\n+ AND4_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nR_U_OFFtimer_R263 U_OFFtimer_DISCH6_SOME U_OFFtimer_N16907529 10 \nX_U_OFFtimer_U654 U_OFFtimer_BUOF BB_LDRV1 BUF_BASIC_GEN PARAMS: VDD=1\n+ VSS=0 VTHRESH=0.5\nX_U_OFFtimer_U27 U_OFFtimer_BOON_BAR U_OFFtimer_N16910889\n+ U_OFFtimer_N16910847 AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U669 U_OFFtimer_TIMER_EXPIRES_INT1 PWM_INT DISCH2_SOME\n+ N16910468 srlatchrhp_basic_gen PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nC_U_OFFtimer_C177 U_OFFtimer_TONBY2 GND 1n IC=0 \nX_U_OFFtimer_S41 U_OFFtimer_N16907329 GND U_OFFtimer_TSBY5 GND\n+ OFF_Timer_mod_U_OFFtimer_S41 \nX_U_OFFtimer_U20 U_OFFtimer_QB_BAR U_OFFtimer_QA_BAR\n+ U_OFFtimer_N16910232 AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U31 U_OFFtimer_BUCOM U_OFFtimer_BOCOM U_OFFtimer_N16907178\n+ OR2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U858 U_OFFtimer_N19200499 U_OFFtimer_N19286930\n+ U_OFFtimer_N19290411 OR2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U864 U_OFFtimer_N19422688 U_OFFtimer_N19391435\n+ U_OFFtimer_ZCD_PFM ZCD AND3_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U29 U_OFFtimer_N16907504 U_OFFtimer_N16907535\n+ U_OFFtimer_PWM_RESET_SHOT AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U850 DISCH2_SOME U_OFFtimer_BUCK_50NS_OFF\n+ U_OFFtimer_N16909355 OR2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nV_U_OFFtimer_V7 U_OFFtimer_N16907277 GND 10\nX_U_OFFtimer_U46 U_OFFtimer_PFM_MODE_ACT U_OFFtimer_N17779772\n+ U_OFFtimer_BLOCK_ON AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U863 U_OFFtimer_N19372792 U_OFFtimer_SET_BB_EXIT_BUCK\n+ BUF_DELAY_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY=20n\nX_U_OFFtimer_U740 BOOST U_OFFtimer_N17111743 INV_BASIC_GEN PARAMS:\n+ VDD=1 VSS=0 VTHRESH=500E-3\nX_U_OFFtimer_U657 U_OFFtimer_N16910876 BB_LDRV1 BB_HDRV1 N16910853\n+ srlatchrhp_basic_gen PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nE_U_BBMode_ABM1 U_BBMode_N16962322 0 VALUE { MAX((V(VIN) - 0.37),1u) \n+ }\nX_U_BBMode_U847 U_BBMode_N16962322 VOUT U_BBMode_N16962427\n+ VIN_GR_VO_BUCK COMPHYS_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nX_U_BBMode_U848 U_BBMode_N16962277 VIN U_BBMode_N16962369\n+ VO_GR_VI_BOOST COMPHYS_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nX_U_BBMode_U664 U_BBMode_N16941801 U_BBMode_N16941782 BUCK N16941786\n+ srlatchrhp_basic_gen PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nX_U_BBMode_U663 U_BBMode_N16942156 U_BBMode_N16942067 BB_MODE BB_MODE_B\n+ srlatchrhp_basic_gen PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nV_U_BBMode_V1 U_BBMode_N16962427 0 50m\nX_U_BBMode_U833 SDWN U_BBMode_SDWN_SHOT one_shot PARAMS: T=100\nV_U_BBMode_V2 U_BBMode_N16962369 0 50m\nX_U_BBMode_U660 BB_EXIT_BOOST BB_EXIT_BUCK U_BBMode_N16942067\n+ OR2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_BBMode_U834 VIN_GR_VO_BUCK VO_GR_VI_BOOST BB_REGION XNOR2_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_BBMode_U665 BOOST_ENTRY U_BBMode_N16952584 BOOST N16942405\n+ srlatchrhp_basic_gen PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nX_U_BBMode_U849 U_BBMode_N17026781 VOUT U_BBMode_N17026774 VI_GR_VO_NEW\n+ COMPHYS_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nX_U_BBMode_U855 BB_ENTRY_BOOST VI_GR_VO_NEW BB_REGION_NEW\n+ U_BBMode_N16952584 OR3_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_BBMode_U840 BB_EXIT_BUCK U_BBMode_N16943295 BUF_DELAY_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY=5n\nX_U_BBMode_U845 BB_EXIT_BOOST BOOST_ENTRY BUF_DELAY_BASIC_GEN PARAMS:\n+ VDD=1 VSS=0 VTHRESH=0.5 DELAY=5n\nV_U_BBMode_V5 U_BBMode_N17026774 0 10m\nX_U_BBMode_U841 BB_ENTRY_BOOST U_BBMode_N16943742 BUF_DELAY_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY=5n\nE_U_BBMode_ABM3 U_BBMode_N17026781 0 VALUE { MAX(V(VIN)-10m,1u) }\nX_U_BBMode_U854 TONMAX VO_GR_VI_NEW BB_REGION_NEW U_BBMode_N16941782\n+ OR3_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_BBMode_U850 U_BBMode_N17026837 VIN U_BBMode_N17026834 VO_GR_VI_NEW\n+ COMPHYS_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nX_U_BBMode_U839 TONMAX U_BBMode_TONMAX_DELAYED BUF_DELAY_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY=5n\nV_U_BBMode_V6 U_BBMode_N17026834 0 10m\nE_U_BBMode_ABM4 U_BBMode_N17026837 0 VALUE { V(VOUT)-10m }\nX_U_BBMode_U661 U_BBMode_SDWN_SHOT U_BBMode_N16943295\n+ U_BBMode_N16941801 OR2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_BBMode_U852 U_BBMode_TONMAX_DELAYED BB_REGION_NEW\n+ U_BBMode_N16943742 U_BBMode_N16942156 OR3_BASIC_GEN PARAMS: VDD=1 VSS=0\n+ VTHRESH=500E-3\nX_U_BBMode_U835 VI_GR_VO_NEW VO_GR_VI_NEW BB_REGION_NEW XNOR2_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nE_U_BBMode_ABM2 U_BBMode_N16962277 0 VALUE { (V(VOUT) - 0.37) }\nX_U_Driver_U1912603733 SDWN U_Driver_N17235621 U_Driver_LDRV1\n+ AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_Driver_U1912603711 U_Driver_N17401465 U_Driver_N17394895\n+ BUF_DELAY_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY=5n\nX_U_Driver_U30 U_Driver_LDRV1_OK U_Driver_N17066231 U_Driver_N17235621\n+ OR2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_Driver_U34 U_Driver_N17530440 U_Driver_N17394895 PRE_HDRV1\n+ AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nC_U_Driver_C1 U_Driver_N17530440 GND 1n \nX_U_Driver_U20 PWM BB_MODE_B U_Driver_N16815558 AND2_BASIC_GEN PARAMS:\n+ VDD=1 VSS=0 VTHRESH=500E-3\nX_U_Driver_U11 PWM U_Driver_PWM_BAR INV_BASIC_GEN PARAMS: VDD=1 VSS=0\n+ VTHRESH=500E-3\nX_U_Driver_U1912603734 PRE_HDRV2 U_Driver_N16778240 U_Driver_HDRV2_OK\n+ AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nD_U_Driver_D3 L2 VOUT D_body \nX_U_Driver_U13 PWM BB_MODE_B U_Driver_N16864262 AND2_BASIC_GEN PARAMS:\n+ VDD=1 VSS=0 VTHRESH=500E-3\nX_U_Driver_U1912603713 U_Driver_N17361947 PRE_HDRV2 BUF_DELAY_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY=5n\nX_U_Driver_U35 PRE_HDRV1 U_Driver_N16773559 U_Driver_HDRV1_OK\n+ AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_Driver_U1912603735 U_Driver_N16778144 PRE_LDRV2 U_Driver_LDRV2_OK\n+ AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nD_U_Driver_D4 GND L2 D_body \nX_U_Driver_U28 U_Driver_N16864262 U_Driver_N16864914 U_Driver_N17177973\n+ OR2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_Driver_U14 U_Driver_PWM_BAR BB_MODE_B U_Driver_N16807058\n+ AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_Driver_U7 U_Driver_LDRV2_OK U_Driver_N16778240 INV_DELAY_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY=2.65n\nX_U_Driver_U21 U_Driver_N16815558 BOOST U_Driver_N16840731\n+ U_Driver_N17401465 OR3_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_Driver_S1 U_Driver_HDRV1 GND U_Driver_N00199 U_Driver_N00214\n+ Driver_U_Driver_S1 \nX_U_Driver_U3 U_Driver_LDRV1_OK U_Driver_N16773559 INV_DELAY_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY=2.65n\nX_U_Driver_U26 BB_MODE BB_HDRV2 U_Driver_N16859689 AND2_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_Driver_U5 U_Driver_HDRV1_OK U_Driver_N16776390 INV_DELAY_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY=2.65n\nX_U_Driver_U9 U_Driver_HDRV2_OK U_Driver_N16778144 INV_DELAY_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY=2.65n\nX_U_Driver_S2 U_Driver_LDRV1 GND U_Driver_N00214 GND Driver_U_Driver_S2 \nX_U_Driver_U1912603712 U_Driver_N17169433 PRE_LDRV1 BUF_DELAY_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY=5n\nD_U_Driver_D1 U_Driver_N00214 U_Driver_N00199 D_body \nX_U_Driver_U1912603729 SDWN U_Driver_HDRV1_OK U_Driver_HDRV1\n+ AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_Driver_S5 OVP_VOUT_DISCH GND VOUT GND Driver_U_Driver_S5 \nX_U_Driver_H2 U_Driver_N00214 L1 IND_SENSE GND Driver_U_Driver_H2 \nX_U_Driver_U12 U_Driver_PWM_BAR BB_MODE_B U_Driver_N16851579\n+ AND2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_Driver_U1912603737 U_Driver_N16776390 PRE_LDRV1 U_Driver_VOUT_1_2V\n+ U_Driver_LDRV1_OK AND3_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_Driver_U1912603731 ZCD SDWN U_Driver_HDRV2_OK U_Driver_HDRV2\n+ AND3_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_Driver_U24 U_Driver_N16851579 U_Driver_N16851759 U_Driver_N17169433\n+ OR2_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nR_U_Driver_R1 ZCD U_Driver_N17530440 0.5 \nX_U_Driver_U1912603709 VOUT U_Driver_N16901036 U_Driver_VOUT_1_2V\n+ COMP_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nX_U_Driver_S3 U_Driver_HDRV2 GND VOUT L2 Driver_U_Driver_S3 \nX_U_Driver_U25 BB_MODE BB_LDRV1 U_Driver_N16851759 AND2_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nV_U_Driver_V7 U_Driver_N16901036 0 1.2\nX_U_Driver_U1912603728 ZCD U_Driver_N17066231 INV_BASIC_GEN PARAMS:\n+ VDD=1 VSS=0 VTHRESH=500E-3\nX_U_Driver_S4 U_Driver_LDRV2 GND L2 GND Driver_U_Driver_S4 \nX_U_Driver_U1912603736 U_Driver_LDRV2_OK ZCD SDWN U_Driver_VOUT_1_2V\n+ U_Driver_LDRV2 AND4_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_Driver_U1912603714 U_Driver_N17177973 PRE_LDRV2 BUF_DELAY_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY=5n\nX_U_Driver_U27 U_Driver_N16807058 BUCK U_Driver_N16859689\n+ U_Driver_N17361947 OR3_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nD_U_Driver_D2 GND U_Driver_N00214 D_body \nX_U_Driver_U29 BB_MODE BB_LDRV2 U_Driver_N16864914 AND2_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_Driver_H1 VIN U_Driver_N00199 ISENSE GND Driver_U_Driver_H1 \nX_U_Driver_U19 BB_MODE BB_HDRV1 U_Driver_N16840731 AND2_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U2 SDWN SDWN_B INV_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=500E-3\nX_U_Mode_U841 U_Mode_N16786866 EN_OK asymmetric_delay PARAMS:\n+ RISING_EDGE_DELAY=300u VTHRESH=0.5 FALLING_EDGE_DELAY=1u VDD=1 VSS=0\nX_U_Mode_U3 EN U_Mode_N04389 U_Mode_N04397 U_Mode_N16786866\n+ COMPHYS_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nX_U_Mode_U838 VIN_OK EN_OK NO_FAULT AND2_BASIC_GEN PARAMS: VDD=1 VSS=0\n+ VTHRESH=500E-3\nV_U_Mode_V5 U_Mode_N04389 GND 1.1\nV_U_Mode_V4 U_Mode_N02189 GND 0.45\nX_U_Mode_U1 MODE U_Mode_N04678 U_Mode_N04686 MODE_HIGH\n+ COMPHYS_BASIC_GEN PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nV_U_Mode_V6 U_Mode_N04397 GND 0.1\nV_U_Mode_V1 U_Mode_N04678 GND 1.2\nV_U_Mode_V2 U_Mode_N04686 GND 0.4\nX_U_Mode_U2 VIN U_Mode_N02181 U_Mode_N02189 VIN_OK COMPHYS_BASIC_GEN\n+ PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nV_U_Mode_V3 U_Mode_N02181 GND 1.7\n.ENDS TPS63802_TRANS\n*$\n.subckt EA_SS_mod_U_EA_S1 1 2 3 4 \nS_U_EA_S1 3 4 1 2 _U_EA_S1\nRS_U_EA_S1 1 2 1G\n.MODEL _U_EA_S1 VSWITCH Roff=1e9 Ron=1.0 Voff=0.2V Von=0.8V\n.ends EA_SS_mod_U_EA_S1\n*$\n.subckt PG_OVP_U_PG_S1 1 2 3 4 \nS_U_PG_S1 3 4 1 2 _U_PG_S1\nRS_U_PG_S1 1 2 1G\n.MODEL _U_PG_S1 VSWITCH Roff=100e6 Ron=23 Voff=0.2V Von=0.8V\n.ends PG_OVP_U_PG_S1\n*$\n.subckt OFF_Timer_mod_U_OFFtimer_S34 1 2 3 4 \nS_U_OFFtimer_S34 3 4 1 2 _U_OFFtimer_S34\nRS_U_OFFtimer_S34 1 2 1G\n.MODEL _U_OFFtimer_S34 VSWITCH Roff=30e9 Ron=1m Voff=0.2 Von=0.8\n.ends OFF_Timer_mod_U_OFFtimer_S34\n*$\n.subckt OFF_Timer_mod_U_OFFtimer_S37 1 2 3 4 \nS_U_OFFtimer_S37 3 4 1 2 _U_OFFtimer_S37\nRS_U_OFFtimer_S37 1 2 1G\n.MODEL _U_OFFtimer_S37 VSWITCH Roff=30e9 Ron=1m Voff=0.2 Von=0.8\n.ends OFF_Timer_mod_U_OFFtimer_S37\n*$\n.subckt OFF_Timer_mod_U_OFFtimer_S35 1 2 3 4 \nS_U_OFFtimer_S35 3 4 1 2 _U_OFFtimer_S35\nRS_U_OFFtimer_S35 1 2 1G\n.MODEL _U_OFFtimer_S35 VSWITCH Roff=30e9 Ron=1m Voff=0.2 Von=0.8\n.ends OFF_Timer_mod_U_OFFtimer_S35\n*$\n.subckt OFF_Timer_mod_U_OFFtimer_S43 1 2 3 4 \nS_U_OFFtimer_S43 3 4 1 2 _U_OFFtimer_S43\nRS_U_OFFtimer_S43 1 2 1G\n.MODEL _U_OFFtimer_S43 VSWITCH Roff=30e9 Ron=1m Voff=0.2 Von=0.8\n.ends OFF_Timer_mod_U_OFFtimer_S43\n*$\n.subckt OFF_Timer_mod_U_OFFtimer_S42 1 2 3 4 \nS_U_OFFtimer_S42 3 4 1 2 _U_OFFtimer_S42\nRS_U_OFFtimer_S42 1 2 1G\n.MODEL _U_OFFtimer_S42 VSWITCH Roff=10e6 Ron=350 Voff=0.2 Von=0.8\n.ends OFF_Timer_mod_U_OFFtimer_S42\n*$\n.subckt OFF_Timer_mod_U_OFFtimer_S44 1 2 3 4 \nS_U_OFFtimer_S44 3 4 1 2 _U_OFFtimer_S44\nRS_U_OFFtimer_S44 1 2 1G\n.MODEL _U_OFFtimer_S44 VSWITCH Roff=10e6 Ron=1.2k Voff=0.2 Von=0.8\n.ends OFF_Timer_mod_U_OFFtimer_S44\n*$\n.subckt OFF_Timer_mod_U_OFFtimer_S31 1 2 3 4 \nS_U_OFFtimer_S31 3 4 1 2 _U_OFFtimer_S31\nRS_U_OFFtimer_S31 1 2 1G\n.MODEL _U_OFFtimer_S31 VSWITCH Roff=5k Ron=2.5k Voff=0.2 Von=0.8\n.ends OFF_Timer_mod_U_OFFtimer_S31\n*$\n.subckt OFF_Timer_mod_U_OFFtimer_S33 1 2 3 4 \nS_U_OFFtimer_S33 3 4 1 2 _U_OFFtimer_S33\nRS_U_OFFtimer_S33 1 2 1G\n.MODEL _U_OFFtimer_S33 VSWITCH Roff=30e9 Ron=1m Voff=0.2 Von=0.8\n.ends OFF_Timer_mod_U_OFFtimer_S33\n*$\n.subckt OFF_Timer_mod_U_OFFtimer_S32 1 2 3 4 \nS_U_OFFtimer_S32 3 4 1 2 _U_OFFtimer_S32\nRS_U_OFFtimer_S32 1 2 1G\n.MODEL _U_OFFtimer_S32 VSWITCH Roff=1000e6 Ron=1 Voff=0.8 Von=0.2\n.ends OFF_Timer_mod_U_OFFtimer_S32\n*$\n.subckt OFF_Timer_mod_U_OFFtimer_S39 1 2 3 4 \nS_U_OFFtimer_S39 3 4 1 2 _U_OFFtimer_S39\nRS_U_OFFtimer_S39 1 2 1G\n.MODEL _U_OFFtimer_S39 VSWITCH Roff=30e9 Ron=1m Voff=0.45 Von=0.4\n.ends OFF_Timer_mod_U_OFFtimer_S39\n*$\n.subckt OFF_Timer_mod_U_OFFtimer_S40 1 2 3 4 \nS_U_OFFtimer_S40 3 4 1 2 _U_OFFtimer_S40\nRS_U_OFFtimer_S40 1 2 1G\n.MODEL _U_OFFtimer_S40 VSWITCH Roff=10e9 Ron=2.5k Voff=0.2 Von=0.8\n.ends OFF_Timer_mod_U_OFFtimer_S40\n*$\n.subckt OFF_Timer_mod_U_OFFtimer_S41 1 2 3 4 \nS_U_OFFtimer_S41 3 4 1 2 _U_OFFtimer_S41\nRS_U_OFFtimer_S41 1 2 1G\n.MODEL _U_OFFtimer_S41 VSWITCH Roff=30e9 Ron=1m Voff=0.2 Von=0.8\n.ends OFF_Timer_mod_U_OFFtimer_S41\n*$\n.subckt Driver_U_Driver_S1 1 2 3 4 \nS_U_Driver_S1 3 4 1 2 _U_Driver_S1\nRS_U_Driver_S1 1 2 1G\n.MODEL _U_Driver_S1 VSWITCH Roff=100e6 Ron=47m Voff=0.2V Von=0.8V\n.ends Driver_U_Driver_S1\n*$\n.subckt Driver_U_Driver_S2 1 2 3 4 \nS_U_Driver_S2 3 4 1 2 _U_Driver_S2\nRS_U_Driver_S2 1 2 1G\n.MODEL _U_Driver_S2 VSWITCH Roff=100e6 Ron=34m Voff=0.2V Von=0.8V\n.ends Driver_U_Driver_S2\n*$\n.subckt Driver_U_Driver_S5 1 2 3 4 \nS_U_Driver_S5 3 4 1 2 _U_Driver_S5\nRS_U_Driver_S5 1 2 1G\n.MODEL _U_Driver_S5 VSWITCH Roff=100e9 Ron=23 Voff=0.2V Von=0.8V\n.ends Driver_U_Driver_S5\n*$\n.subckt Driver_U_Driver_H2 1 2 3 4 \nH_U_Driver_H2 3 4 VH_U_Driver_H2 1\nVH_U_Driver_H2 1 2 0V\n.ends Driver_U_Driver_H2\n*$\n.subckt Driver_U_Driver_S3 1 2 3 4 \nS_U_Driver_S3 3 4 1 2 _U_Driver_S3\nRS_U_Driver_S3 1 2 1G\n.MODEL _U_Driver_S3 VSWITCH Roff=100e6 Ron=44m Voff=0.2V Von=0.8V\n.ends Driver_U_Driver_S3\n*$\n.subckt Driver_U_Driver_S4 1 2 3 4 \nS_U_Driver_S4 3 4 1 2 _U_Driver_S4\nRS_U_Driver_S4 1 2 1G\n.MODEL _U_Driver_S4 VSWITCH Roff=100e6 Ron=22m Voff=0.2V Von=0.8V\n.ends Driver_U_Driver_S4\n*$\n.subckt Driver_U_Driver_H1 1 2 3 4 \nH_U_Driver_H1 3 4 VH_U_Driver_H1 1\nVH_U_Driver_H1 1 2 0V\n.ends Driver_U_Driver_H1\n*$\n.SUBCKT INV_BASIC_GEN A Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5 \nE_ABMGATE YINT 0 VALUE {{IF(V(A) > {VTHRESH} , \n+ {VSS},{VDD})}}\nRINT YINT Y 1\nCINT Y 0 1n\n.ENDS INV_BASIC_GEN\n*$\n.SUBCKT INV_DELAY_BASIC_GEN A Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5 DELAY = 10n \nE_ABMGATE1 YINT1 0 VALUE {{IF(V(A) > {VTHRESH} , \n+ {VDD},{VSS})}}\nRINT YINT1 YINT2 1\nCINT YINT2 0 {DELAY*1.3}\nE_ABMGATE2 YINT3 0 VALUE {{IF(V(YINT2) > {VTHRESH} , \n+ {VSS},{VDD})}}\nRINT2 YINT3 Y 1\nCINT2 Y 0 1n\n.ENDS INV_DELAY_BASIC_GEN\n*$\n.SUBCKT AND2_BASIC_GEN A B Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5 \nE_ABMGATE YINT 0 VALUE {{IF(V(A) > {VTHRESH} & \n+ V(B) > {VTHRESH},{VDD},{VSS})}}\nRINT YINT Y 1\nCINT Y 0 1n\n.ENDS AND2_BASIC_GEN\n*$\n.SUBCKT AND2_BASIC_GEN_drv A B Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5 \nE_ABMGATE YINT 0 VALUE {{IF(V(A) > {VTHRESH} & \n+ V(B) > {VTHRESH},{VDD},{VSS})}}\nRINT YINT Y 1\nCINT Y 0 10p\n.ENDS AND2_BASIC_GEN_drv\n*$\n.SUBCKT OR2_BASIC_GEN A B Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5 \nE_ABMGATE YINT 0 VALUE {{IF(V(A) > {VTHRESH} | \n+ V(B) > {VTHRESH},{VDD},{VSS})}}\nRINT YINT Y 1\nCINT Y 0 1n\n.ENDS OR2_BASIC_GEN\n*$\n.SUBCKT NOR2_BASIC_GEN A B Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5 \nE_ABMGATE YINT 0 VALUE {{IF(V(A) > {VTHRESH} | \n+ V(B) > {VTHRESH},{VSS},{VDD})}}\nRINT YINT Y 1\nCINT Y 0 1n\n.ENDS NOR2_BASIC_GEN\n*$\n.SUBCKT OR3_BASIC_GEN A B C Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5 \nE_ABMGATE YINT 0 VALUE {{IF(V(A) > {VTHRESH} | \n+ V(B) > {VTHRESH} |\n+ V(C) > {VTHRESH},{VDD},{VSS})}}\nRINT YINT Y 1\nCINT Y 0 1n\n.ENDS OR3_BASIC_GEN\n*$\n.SUBCKT OR4_BASIC_GEN A B C D Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5 \nE_ABMGATE YINT 0 VALUE {{IF(V(A) > {VTHRESH} | \n+ V(B) > {VTHRESH} |\n+ V(C) > {VTHRESH} |\n+ V(D) > {VTHRESH},{VDD},{VSS})}}\nRINT YINT Y 1\nCINT Y 0 1n\n.ENDS OR4_BASIC_GEN\n*$\n.SUBCKT COMP_BASIC_GEN INP INM Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5\t\nE_ABM Yint 0 VALUE {IF (V(INP) > \n+ V(INM), {VDD},{VSS})}\nR1 Yint Y 1\nC1 Y 0 1n\n.ENDS COMP_BASIC_GEN\n*$\n.SUBCKT BUF_BASIC_GEN A Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5 \nE_ABMGATE YINT 0 VALUE {{IF(V(A) > {VTHRESH} , \n+ {VDD},{VSS})}}\nRINT YINT Y 1\nCINT Y 0 1n \n.ENDS BUF_BASIC_GEN\n*$\n.SUBCKT BUF_DELAY_BASIC_GEN A Y PARAMS: VDD=5 VSS=0 VTHRESH=2.5\n+ DELAY = 10n \nE_ABMGATE1 YINT1 0 VALUE {{IF(V(A) > {VTHRESH} , \n+ {VDD},{VSS})}}\nRINT YINT1 YINT2 1\nCINT YINT2 0 {DELAY*1.3} \nE_ABMGATE2 YINT3 0 VALUE {{IF(V(YINT2) > {VTHRESH} , \n+ {VDD},{VSS})}}\nRINT2 YINT3 Y 1\nCINT2 Y 0 1n\n.ENDS BUF_DELAY_BASIC_GEN\n*$\n.SUBCKT BUF_DELAY_BASIC_GEN1 A Y PARAMS: VDD=5 VSS=0 VTHRESH=2.5\n+ DELAY = 10n \nE_ABMGATE1 YINT1 0 VALUE {{IF(V(A) > {VTHRESH} , \n+ {VDD},{VSS})}}\nRINT YINT1 YINT2 1\nCINT YINT2 0 {DELAY*1.3}\nE_ABMGATE2 YINT3 0 VALUE {{IF(V(YINT2) > {VTHRESH} , \n+ {VDD},{VSS})}}\nRINT2 YINT3 Y 1\nCINT2 Y 0 1n\n.ENDS BUF_DELAY_BASIC_GEN1\n*$\n.SUBCKT AND3_BASIC_GEN A B C Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5 \nE_ABMGATE YINT 0 VALUE {{IF(V(A) > {VTHRESH} & \n+ V(B) > {VTHRESH} &\n+ V(C) > {VTHRESH},{VDD},{VSS})}}\nRINT YINT Y 1\nCINT Y 0 1n\n.ENDS AND3_BASIC_GEN\n*$\n.SUBCKT AND3_BASIC_GEN_drv A B C Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5 \nE_ABMGATE YINT 0 VALUE {{IF(V(A) > {VTHRESH} & \n+ V(B) > {VTHRESH} &\n+ V(C) > {VTHRESH},{VDD},{VSS})}}\nRINT YINT Y 1\nCINT Y 0 10p\n.ENDS AND3_BASIC_GEN_drv\n*$\n.SUBCKT XNOR2_BASIC_GEN A B Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5 \nE_ABMGATE YINT 0 VALUE {{IF(V(A) > {VTHRESH} ^ \n+ V(B) > {VTHRESH},{VSS},{VDD})}}\nRINT YINT Y 1\nCINT Y 0 1n\n.ENDS XNOR2_BASIC_GEN\n*$\n.SUBCKT COMPHYS_BASIC_GEN INP INM HYS OUT PARAMS: VDD=1 VSS=0 VTHRESH=0.5\t\nEIN INP1 INM1 INP INM 1 \nEHYS INP1 INP2 VALUE { IF( V(1) > {VTHRESH},-V(HYS),0) }\nEOUT OUT 0 VALUE { IF( V(INP2)>V(INM1), {VDD} ,{VSS}) }\nR1 OUT 1 1\nC1 1 0 5n\nRINP1 INP1 0 1K\n.ENDS COMPHYS_BASIC_GEN\n*$\n.subckt srlatchrhp_basic_gen s r q qb params: vdd=1 vss=0 vthresh=0.5 \ngq 0 qint value = {if(v(r) > {vthresh},-5,if(v(s)>{vthresh},5, 0))}\ncqint qint 0 1n\nrqint qint 0 1000meg\nd_d10 qint my5 d_d1\nv1 my5 0 {vdd}\nd_d11 myvss qint d_d1\nv2 myvss 0 {vss} \neq qqq 0 qint 0 1\nx3 qqq q buf_basic_gen params: vdd={vdd} vss={vss} vthresh={vthresh}\neqb qbr 0 value = {if( v(q) > {vthresh}, {vss},{vdd})}\nrqb qbr qb 1\ncdummy2 qb 0 1n\n.ic v(qint) {vss}\n.model d_d1 d\n+ is=1e-015\n+ tt=1e-011\n+ rs=0.005\n+ n=0.01\n.ends srlatchrhp_basic_gen\n*$\n.SUBCKT DFF_R Q QB CLK D R PARAMS: VDD=1 VSS=0 VTHRESH=0.5\nX1 CLK CLKdel INV_DELAY_BASIC_GEN PARAMS: VDD={VDD} VSS={VSS} VTHRESH={VTHRESH} DELAY = 15n\nX2 CLK CLKdel CLKint AND2_BASIC_GEN PARAMS: VDD={VDD} VSS={VSS} VTHRESH={VTHRESH}\nGQ 0 Qint VALUE = {IF(V(R) > {VTHRESH},-5,IF(V(CLKint)> {VTHRESH},\n+ IF(V(D)> {VTHRESH},5,-5),0))}\nCQint Qint 0 1n\nRQint Qint 0 10000MEG\nD_D10 Qint MY5 D_D1\nV1 MY5 0 {VDD}\nD_D11 MYVSS Qint D_D1 \t\nV2 MYVSS 0 {VSS}\nEQ Qqq 0 Qint 0 1\nX3 Qqq Q BUF_DELAY_BASIC_GEN PARAMS: VDD={VDD} VSS={VSS} VTHRESH={VTHRESH} DELAY = 20n\nEQb Qbr 0 VALUE = {IF( V(Q) > {VTHRESH}, {VSS},{VDD})}\nRQb Qbr Qb 1\nCdummy2 QB 0 1nF\n.IC V(Qint) {VSS}\n.ENDS DFF_R\n*$\n.SUBCKT CESR IN OUT\n+ PARAMs: C=100u ESR=0.01 X=2 IC=0\nC\tIN 1 {C*X} IC={IC}\nRESR\t1 OUT {ESR/X}\n.ENDS CESR\n*$\n.SUBCKT LDCR IN OUT\n+ PARAMs: L=1u DCR=0.01 IC=0\nL\tIN 1 {L} IC={IC}\nRDCR\t1 OUT {DCR}\n.ENDS LDCR\n*$\n.model D_D1 d\n+ is=1e-015\n+ tt=1e-011\n+ rs=0.05\n+ n=0.1\n*$\n.model D_body d\n+ is=1e-015\n+ tt=1e-011\n+ rs=0.05\n+ n=0.7\n*$\n.subckt one_shot in out\n+ params: t=100\ns_s1 meas 0 reset2 0 s1\ne_abm1 ch 0 value { if( v(in)>0.5 | v(out)>0.5,1,0) }\nr_r2 reset2 reset 0.1 \ne_abm3 out 0 value { if( v(meas)<0.5 & v(ch)>0.5,1,0) }\nr_r1 meas ch {t} \nc_c2 0 reset2 1.4427n \nc_c1 0 meas 1.4427n \ne_abm2 reset 0 value { if(v(ch)<0.5,1,0) }\n.model s1 vswitch\n+ roff=1e+009\n+ ron=1\n+ voff=0.25\n+ von=0.75\n.ends one_shot\n*$\n.subckt LOAD_MODULE VOUT GND_0 PARAMS: VOUT=1 ILOAD=1 ILOAD2=2 TD=1m TR=10u TF=10u PW=100u\nX_S1 VLOAD GND_0 VOUT GND_0 LOAD_MODULE_S1 PARAMS: VOUT={VOUT} ILOAD={ILOAD} ILOAD2={ILOAD2}\nV_V1 VLOAD GND_0 \n+PULSE 0 1 {TD} {TR} {TF} {PW} 2\n.ends LOAD_MODULE\n*$\n.subckt LOAD_MODULE_S1 1 2 3 4 PARAMS: VOUT=1 ILOAD=1 ILOAD2=2 \nS_S1 3 4 1 2 _S1\nRS_S1 1 2 1G\n.MODEL _S1 VSWITCH Roff={{VOUT}/{ILOAD}} Ron={{VOUT}/{ILOAD2}}\n+ Voff=0.2 Von=0.8\n.ends LOAD_MODULE_S1\n*$\n.subckt asymmetric_delay inp out params: rising_edge_delay=1 vthresh=0.5\n+ falling_edge_delay=1 vdd=1 vss=0\ne_abm3 inp1 0 value { if(v(inp) > {vthresh}, {vdd} , {vss}) }\ne_abm1 yin4 0 value { if(v(yin3) > {vthresh}, {vdd} , {vss}) }\ne_abm2 yin2 0 value { if(v(yin1) > {vthresh}, {vdd} , {vss}) }\nr_rint inp1 yin1 1 \nc_cint yin1 0 {1.443*rising_edge_delay} \nd_d10 yin1 inp1 d_d1\nr_r1 yin4 out 1 \nr_rout yin2 yin3 1 \nc_cout yin3 0 {1.443*falling_edge_delay} \nc_c1 0 out 1n \nd_d11 yin2 yin3 d_d1\n.model d_d1 d\n+ is=1e-015\n+ tt=1e-011\n+ rs=0.005\n+ n=0.1\n.ends asymmetric_delay\n*$\n.SUBCKT SRLATCHSHP_BASIC_NEW Q Qb R S PARAMS: ic=1 thresh=2.5 vdd=5 vss=0\nC_C1 Q 0 1n IC={IC} \nC_C2 0 QB 1n \nE_ABM5 N00055 0 VALUE { if(v(S) >{THRESH},{VDD},if(v(R)>{THRESH},{VSS},\n+ V(Q))) }\nR_R1 N00055 Q 1 \nE_ABM6 N14322195 0 VALUE { IF(V(Q)<{THRESH},{VDD},{VSS}) }\nR_R2 N14322195 QB 1 \n.ENDS SRLATCHSHP_BASIC_NEW\n*$\n.SUBCKT AND4_BASIC_GEN A B C D Y PARAMS: VDD=1 VSS=0 VTHRESH=0.5 \nE_ABMGATE YINT 0 VALUE {{IF(V(A) > {VTHRESH} & \n+ V(B) > {VTHRESH} &\n+ V(C) > {VTHRESH} &\n+ V(D) > {VTHRESH},{VDD},{VSS})}}\nRINT YINT Y 1\nCINT Y 0 1n\n.ENDS AND4_BASIC_GEN\n*$\n.SUBCKT SRLATCHRHP_BASIC_NEW Q Qb R S PARAMS: ic=1 thresh=2.5 vdd=5 vss=0\nC_C1 Q 0 1n IC={IC} \nC_C2 0 QB 1n \nE_ABM5 N00055 0 VALUE { if(v(R) >{THRESH},{VSS},if(v(S)>{THRESH},{VDD},\n+ V(Q))) }\nR_R1 N00055 Q 1 \nE_ABM6 N14322195 0 VALUE { IF(V(Q)<{THRESH},{VDD},{VSS}) }\nR_R2 N14322195 QB 1 \n.ENDS SRLATCHRHP_BASIC_NEW\n*$\n"
},
{
"type": "schematic_component",
"schematic_component_id": "schematic_component_0",
"center": {
"x": 0,
"y": 0
},
"rotation": 0,
"size": {
"width": 1.2000000000000002,
"height": 1.2000000000000002
},
"pin_spacing": 0.2,
"port_labels": {
"pin1": "EN",
"pin2": "MODE",
"pin3": "AGND",
"pin4": "FB",
"pin5": "PG",
"pin6": "VOUT",
"pin7": "L2",
"pin8": "GND",
"pin9": "L1",
"pin10": "VIN"
},
"source_component_id": "source_component_0",
"schematic_group_id": "schematic_group_0"
},
{
"type": "schematic_text",
"schematic_text_id": "schematic_text_0",
"text": "",
"schematic_component_id": "schematic_component_0",
"anchor": "left",
"rotation": 0,
"position": {
"x": -0.6000000000000001,
"y": -0.7300000000000001
},
"color": "#006464",
"font_size": 0.18
},
{
"type": "schematic_text",
"schematic_text_id": "schematic_text_1",
"text": "",
"schematic_component_id": "schematic_component_0",
"anchor": "left",
"rotation": 0,
"position": {
"x": -0.6000000000000001,
"y": 0.7300000000000001
},
"color": "#006464",
"font_size": 0.18
},
{
"type": "schematic_group",
"schematic_group_id": "schematic_group_0",
"is_subcircuit": true,
"subcircuit_id": "subcircuit_source_group_0",
"name": "unnamed_group1",
"center": {
"x": 0,
"y": 0
},
"width": 0,
"height": 0,
"schematic_component_ids": [],
"source_group_id": "source_group_0",
"show_as_schematic_box": false
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_0",
"schematic_component_id": "schematic_component_0",
"center": {
"x": -1,
"y": 0.4
},
"source_port_id": "source_port_0",
"facing_direction": "left",
"distance_from_component_edge": 0.4,
"side_of_component": "left",
"pin_number": 1,
"true_ccw_index": 0,
"display_pin_label": "EN",
"is_connected": false
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_1",
"schematic_component_id": "schematic_component_0",
"center": {
"x": -1,
"y": 0.2
},
"source_port_id": "source_port_1",
"facing_direction": "left",
"distance_from_component_edge": 0.4,
"side_of_component": "left",
"pin_number": 2,
"true_ccw_index": 1,
"display_pin_label": "MODE",
"is_connected": false
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_2",
"schematic_component_id": "schematic_component_0",
"center": {
"x": -1,
"y": 0
},
"source_port_id": "source_port_2",
"facing_direction": "left",
"distance_from_component_edge": 0.4,
"side_of_component": "left",
"pin_number": 3,
"true_ccw_index": 2,
"display_pin_label": "AGND",
"is_connected": false
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_3",
"schematic_component_id": "schematic_component_0",
"center": {
"x": -1,
"y": -0.20000000000000007
},
"source_port_id": "source_port_3",
"facing_direction": "left",
"distance_from_component_edge": 0.4,
"side_of_component": "left",
"pin_number": 4,
"true_ccw_index": 3,
"display_pin_label": "FB",
"is_connected": false
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_4",
"schematic_component_id": "schematic_component_0",
"center": {
"x": -1,
"y": -0.4
},
"source_port_id": "source_port_4",
"facing_direction": "left",
"distance_from_component_edge": 0.4,
"side_of_component": "left",
"pin_number": 5,
"true_ccw_index": 4,
"display_pin_label": "PG",
"is_connected": false
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_5",
"schematic_component_id": "schematic_component_0",
"center": {
"x": 1,
"y": -0.4
},
"source_port_id": "source_port_5",
"facing_direction": "right",
"distance_from_component_edge": 0.4,
"side_of_component": "right",
"pin_number": 6,
"true_ccw_index": 5,
"display_pin_label": "VOUT",
"is_connected": false
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_6",
"schematic_component_id": "schematic_component_0",
"center": {
"x": 1,
"y": -0.2
},
"source_port_id": "source_port_6",
"facing_direction": "right",
"distance_from_component_edge": 0.4,
"side_of_component": "right",
"pin_number": 7,
"true_ccw_index": 6,
"display_pin_label": "L2",
"is_connected": false
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_7",
"schematic_component_id": "schematic_component_0",
"center": {
"x": 1,
"y": 0
},
"source_port_id": "source_port_7",
"facing_direction": "right",
"distance_from_component_edge": 0.4,
"side_of_component": "right",
"pin_number": 8,
"true_ccw_index": 7,
"display_pin_label": "GND",
"is_connected": false
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_8",
"schematic_component_id": "schematic_component_0",
"center": {
"x": 1,
"y": 0.20000000000000007
},
"source_port_id": "source_port_8",
"facing_direction": "right",
"distance_from_component_edge": 0.4,
"side_of_component": "right",
"pin_number": 9,
"true_ccw_index": 8,
"display_pin_label": "L1",
"is_connected": false
},
{
"type": "schematic_port",
"schematic_port_id": "schematic_port_9",
"schematic_component_id": "schematic_component_0",
"center": {
"x": 1,
"y": 0.4
},
"source_port_id": "source_port_9",
"facing_direction": "right",
"distance_from_component_edge": 0.4,
"side_of_component": "right",
"pin_number": 10,
"true_ccw_index": 9,
"display_pin_label": "VIN",
"is_connected": false
},
{
"type": "pcb_component",
"pcb_component_id": "pcb_component_0",
"center": {
"x": 0,
"y": 0
},
"width": 2.4000841,
"height": 2.2999954000000002,
"layer": "top",
"rotation": 0,
"source_component_id": "source_component_0",
"subcircuit_id": "subcircuit_source_group_0",
"do_not_place": false,
"obstructs_within_bounds": true,
"is_allowed_to_be_off_board": false,
"pcb_group_id": "pcb_group_0"
},
{
"type": "pcb_group",
"pcb_group_id": "pcb_group_0",
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