techmannih/nema34-mounted-stepper-controller
A 48 V USB‑C PD 3.1 EPR NEMA‑34 stepper controller PCB combining STM32/TMC5160 control, external MOSFET motor bridges, protected power and regenerative braking, USB data, telemetry, diagnostics, status LEDs, and buzzer alarms.
- Version
- 0.3.92
- License
- unset
- Stars
- 1
docs/decoupling-targets.json
[
[
"U1",
10,
"C2"
],
[
"U2",
32,
"C6"
],
[
"U2",
1,
"C7"
],
[
"U2",
4,
"C8"
],
[
"U3",
8,
"C9"
],
[
"U4",
5,
"C10"
],
[
"U5",
2,
"C12"
],
[
"U6",
17,
"C21"
],
[
"U7",
3,
"C25"
],
[
"U7",
5,
"C26"
],
[
"U7",
29,
"C27"
],
[
"U7",
20,
"C28"
],
[
"U7",
33,
"C29"
],
[
"U7",
4,
"C61"
],
[
"U10",
5,
"C38"
],
[
"U11",
5,
"C39"
],
[
"U13",
5,
"C40"
],
[
"U14",
5,
"C41"
],
[
"U15",
1,
"C43"
],
[
"U16",
6,
"C44",
{
"placement_limit_mm": 3.7,
"reason": "UFQFPN48 lands move 0.875 mm inward from the previous LQFP row. C44/C45/C46 retain their proven ground returns and top-side branches; measured source paths remain 3.26/3.98/3.77 mm (all below the unchanged 5 mm native limit). This explicit 3.7 mm centre-distance bound preserves the local bypass placement without disturbing the adjacent crystal, USB and buzzer paths. Hardware rail ripple remains unqualified."
}
],
[
"U16",
5,
"C45",
{
"placement_limit_mm": 3.7,
"reason": "UFQFPN48 lands move 0.875 mm inward from the previous LQFP row. C44/C45/C46 retain their proven ground returns and top-side branches; measured source paths remain 3.26/3.98/3.77 mm (all below the unchanged 5 mm native limit). This explicit 3.7 mm centre-distance bound preserves the local bypass placement without disturbing the adjacent crystal, USB and buzzer paths. Hardware rail ripple remains unqualified."
}
],
[
"U16",
4,
"C46",
{
"placement_limit_mm": 3.7,
"reason": "UFQFPN48 lands move 0.875 mm inward from the previous LQFP row. C44/C45/C46 retain their proven ground returns and top-side branches; measured source paths remain 3.26/3.98/3.77 mm (all below the unchanged 5 mm native limit). This explicit 3.7 mm centre-distance bound preserves the local bypass placement without disturbing the adjacent crystal, USB and buzzer paths. Hardware rail ripple remains unqualified."
}
],
[
"U17",
8,
"C51"
],
[
"U18",
11,
"C52",
{
"reason": "Only U18 is allowed on the bottom. C52 retains its XY pad centers on top, joined through one 0.60/0.30 mm V3V3 via at source (-0.6,-3.9), native (99.4,103.9). The 5 mm budget includes the 1.6 mm board thickness; all ordinary bypasses remain on the IC side. Encoder supply/ground ripple still requires powered qualification.",
"layer_transition": {
"from": "bottom",
"to": "top",
"source_xy_mm": [
-0.6,
-3.9
],
"native_xy_mm": [
99.4,
103.9
],
"pad_mm": 0.6,
"drill_mm": 0.3,
"barrel_mm": 1.6,
"maximum_vias": 1
}
}
],
[
"U22",
2,
"C63"
],
[
"U23",
1,
"C69"
],
[
"U24",
1,
"C70"
],
[
"U28",
1,
"C74"
],
[
"U25",
1,
"C75"
],
[
"U25",
5,
"C76"
],
[
"U26",
1,
"C77"
],
[
"U27",
1,
"C78"
],
[
"U29",
5,
"C79"
],
[
"U30",
8,
"C80"
],
[
"U31",
6,
"C81"
],
[
"U32",
6,
"C82"
],
[
"U33",
5,
"C85"
],
[
"U34",
2,
"C87",
{
"placement_limit_mm": 3.3,
"reason": "U34 VIN is the second pin of the PowerPAD package. C87 sits directly beside the package courtyard; the allowed 3.3 mm pad-center spacing clears PGND while retaining a <=5 mm top-layer connection. See docs/power-validation.md."
}
],
[
"U34",
6,
"C88"
],
[
"U12",
4,
"C93"
],
[
"U12",
6,
"C94"
],
[
"U35",
16,
"C95"
],
[
"U36",
8,
"C97"
],
[
"U37",
5,
"C99"
]
]