seveibar/pd-dual-stepper-controller

engineering/dual-routing-status.md

# Dual revision routing status

The 55 × 45 mm four-layer board is fully routed. This reduces area by 31.25% from the previous 80 × 45 mm layout while retaining four M3 mounting holes on a 47 × 37 mm pitch. Both right-angle JST PH outputs mate through the right-hand board edge. The driver groups are aligned beside their connectors, with the RP2040 on the left and shared power circuitry in the center.

## Verification

- TypeScript passes; six functional/mechanical tests pass with 75 assertions.
- Both the routed build and direct default-entry export contain zero native PCB error records.
- All 119 electrical nets are physically connected, accounting for five documented internal component connections. No split nets, unmapped copper or shorts remain.
- Native routing checks and Gerber-based short detection pass.
- Pad/trace/via clearances, mounting keepouts, component placement, drill spacing, drilled-hole-to-copper and board-edge checks have zero violations.
- Exported Gerber/Excellon clearances pass. Both drivers retain 12 original in-pad thermal vias with solid ground contact on the inner layers and bottom, verified plated drills, solderable top thermal pads and tented bottom vias.
- All 28 checked motor/input power source paths are on outer layers, with at least 0.3 mm exposed track width. Wider portions use 0.8–1 mm copper. Kelvin telemetry branches remain separated outside their shunts.
- Assembly outputs contain 119 top-side components. Bare test points and mounting holes are excluded from assembly placement.

`dist/dual/validation.json` identifies the exact circuit and Gerber hashes. Detailed independent reports are under `reports/`. One cosmetic schematic capacitor-orientation advisory remains. No application firmware or physical, USB-PD, simultaneous-load or thermal prototype testing has been completed. The 1 A full-scale phase current is a current-limit setting, not a demonstrated continuous thermal rating; both motors share the 2 A input protection.

## Rebuilding and rerouting

The default entry point and `bun run build` load `routing/dual-route-plan.json` through a geometry/connectivity guard. A direct CLI export of the default entry point was also checked and has zero embedded PCB errors. Source edits that alter the guarded input must be rerouted and independently audited.

Normal builds use Bun and the locked dependencies. Independent geometry audits require Python with `numpy` and `shapely`. Rerouting additionally uses Java 21 and Freerouting 2.0.1; the synchronous runner is `scripts/RouteBoard.java`. Capture/export/import tools and local repair tools are preserved under `scripts/`. Intermediate Freerouting airwire/path counts are not the final validation: the final generated copper, native checks and exported-file audits are authoritative.

Run the documented `verify`, `check:manufacturing`, `check:shorts`, `export:manufacturing`, and `check:exports` package scripts after relevant changes. Regenerating exports changes their hashes; rerun audits and update the validation manifest together.