seveibar/f1c100s-linux-dev-board
A 4-layer F1C100S Linux development carrier board with USB‑C power/data, multi-rail LDOs, SPI NOR flash, reset/boot interfaces, I²C/SPI/UART headers, ESD protection, and a buffered 5‑V clocked RGB LED.
- Version
- 1.9.2
- License
- unset
- Stars
- 1
fabrication/README.md
# F1C100S fabrication revision 1.9.2
Generated from the verified revised circuit, not the previous release. Four-layer 58 × 48 mm board; all 84 fitted components on top. Gerbers and plated/non-plated drill files are provided individually and in board-gerbers.zip. The zip also includes BOM and pick-and-place exports. assembly-bom.csv preserves manufacturer identifiers.
DRAM regulator U_2V5 is AP2112K-2.5TRG1, C176945; codec regulator U_2V8 is AP2127K-2.8TRG1, JLCPCB C460327. Do not substitute a 1.8 V part. Confirm current inventory for all other parts before ordering. Pin-1 and supplier orientation must be reviewed in the assembly preview.
routing-verification.json records zero emitted DRC errors and passing electrical/placement checks. export-checks.json checks all 84 pick-and-place centers, sides and rotations against the circuit. These software checks do not qualify this unbuilt prototype. See ../POWER-REVISION.md for power startup and thermal validation still needed. Fabricator stackup and USB impedance must be finalized.
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