seveibar/am3352-dev-board-4layer-dogbone

Defines PCB footprints and pin mappings for a TI AM3352ZCZ100 processor, JST GH connectors, and assembly-part lookup helpers for capacitors, resistors, and headers.

Version
0.1.5
License
unset
Stars
0

scripts/verify-interfaces.mjs

import fs from 'node:fs'
import assert from 'node:assert/strict'
const c=JSON.parse(fs.readFileSync('dist/index/circuit.json'))
const sc=name=>c.find(e=>e.type==='source_component'&&e.name===name)
const ports=c.filter(e=>e.type==='source_port')
const represented=new Set(c.filter(e=>e.type==='schematic_port').map(e=>e.source_port_id))
for(const [name,count] of [['U1',324],['U2',49],['U3',96]]){
 const ps=ports.filter(p=>p.source_component_id===sc(name).source_component_id)
 assert.equal(ps.length,count,name+' physical pin count')
 assert(ps.every(p=>represented.has(p.source_port_id)),name+' schematic must represent every physical pin')
}
assert.equal(c.filter(e=>e.type==='schematic_sheet').length,8)
const netIds=new Map(c.filter(e=>e.type==='source_net').map(e=>[e.name,e.source_net_id]))
for(const [name,nets] of Object.entries({J_SPI:['GND','V3V3','SPI0_SCLK','SPI0_D0','SPI0_D1','SPI0_CS0','GND','GND'],J_I2C:['GND','V3V3','I2C0_SDA','I2C0_SCL','GND','GND'],J_PROG:['GND','UART0_TXD','UART0_RXD','V3V3','GND','GND']})){
 const ps=ports.filter(p=>p.source_component_id===sc(name).source_component_id)
 nets.forEach((n,i)=>{const p=ps.find(p=>p.pin_number===i+1);assert(p,name+' pin '+(i+1));assert(c.some(t=>t.type==='source_trace'&&t.connected_source_port_ids.includes(p.source_port_id)&&t.connected_source_net_ids.includes(netIds.get(n))),name+' pin '+(i+1)+' -> '+n)})
 const pcb=c.find(e=>e.type==='pcb_component'&&e.source_component_id===sc(name).source_component_id)
 assert(pcb.center.x<0&&pcb.center.y<0,name+' bottom-left placement')
}
console.log('Eight schematic sheets, all 469 IC pins represented, and all JST pinouts/placements verified')