seveibar/am3352-dev-board-4layer-dogbone
Defines PCB footprints and pin mappings for a TI AM3352ZCZ100 processor, JST GH connectors, and assembly-part lookup helpers for capacitors, resistors, and headers.
- Version
- 0.1.5
- License
- unset
- Stars
- 0
scripts/verify-decoupling.py
"""Measure the actual compiled placement against the previous capacitor locations."""
import json,math,statistics
from pathlib import Path
c=json.loads(Path('dist/index/circuit.json').read_text());r=json.loads(Path('design/decoupling-report.json').read_text())['capacitors'];src={e['source_component_id']:e['name'] for e in c if e['type']=='source_component'}
components={src[e['source_component_id']]:e for e in c if e['type']=='pcb_component'};ports={e['source_port_id']:e for e in c if e['type']=='pcb_port'}
sourcePorts=[e for e in c if e['type']=='source_port'];rows=[]
for item in r:
name=item['name'];comp=components[name];assert comp['layer']=='bottom',name
pin=next(p for p in sourcePorts if src[p['source_component_id']]==name and p['pin_number']==1);p=ports[pin['source_port_id']]
ball=next(p for p in sourcePorts if src[p['source_component_id']]==item['chip'] and p['name']==item['ball']);b=ports[ball['source_port_id']]
distance=math.hypot(p['x']-b['x'],p['y']-b['y']);assert abs(distance-item['padToBallMm'])<.005,(name,'compiled pad differs from optimized placement',distance,item['padToBallMm'])
rows.append({'capacitor':name,'target':item['chip']+'.'+item['ball'],'padToBallMm':round(distance,4),'previousPadToBallMm':item['oldPadToBallMm']})
summary={}
for chip in ['U1','U3']:
group=[x for x in rows if x['target'].startswith(chip+'.')];old=[x['previousPadToBallMm'] for x in group if x['previousPadToBallMm'] is not None];new=[x['padToBallMm'] for x in group];assert statistics.mean(new)<statistics.mean(old)
summary[chip]={'capacitors':len(group),'previousMeanMm':round(statistics.mean(old),3),'newMeanMm':round(statistics.mean(new),3),'newMaxMm':round(max(new),3)}
assert len(rows)==90
out={'metric':'Planar distance from capacitor power-pad center to the associated BGA ball center projected onto the bottom layer. Electrical loop inductance is not simulated.','summary':summary,'capacitors':rows}
Path('design/decoupling-validation.json').write_text(json.dumps(out,indent=2)+'\n');print(json.dumps(summary,indent=2))