seveibar/am3352-dev-board-4layer-dogbone

Defines PCB footprints and pin mappings for a TI AM3352ZCZ100 processor, JST GH connectors, and assembly-part lookup helpers for capacitors, resistors, and headers.

Version
0.1.5
License
unset
Stars
0

scripts/update-decoupling-via-distances.py

"""Refresh pad-to-via distances from the final compiled copper geometry."""
import json,runpy,math
from pathlib import Path
a=runpy.run_path('scripts/audit-copper.py');c=a['c'];components={e['name']:e['source_component_id'] for e in c if e['type']=='source_component'};ports={e['source_port_id']:e for e in c if e['type']=='pcb_port'};source_ports=[e for e in c if e['type']=='source_port'];vias={}
for t in c:
 if t['type']!='pcb_trace':continue
 root=a['find'](t.get('source_trace_id',t['pcb_trace_id']))
 for p in t['route']:
  if p['route_type']=='via':vias.setdefault(root,set()).add((p['x'],p['y']))
p=Path('design/decoupling-report.json');report=json.loads(p.read_text())
for cap in report['capacitors']:
 cid=components[cap['name']]
 for pin,field in [(1,'nearestPowerViaMm'),(2,'nearestGroundViaMm')]:
  port=next(e for e in source_ports if e['source_component_id']==cid and e['pin_number']==pin);pad=ports[port['source_port_id']];points=vias.get(a['find'](port['source_port_id']),set());assert points,(cap['name'],pin)
  cap[field]=round(min(math.dist((pad['x'],pad['y']),xy) for xy in points),4)
report['viaDistanceMetric']='Planar center-to-center distance from each compiled capacitor pad to the nearest through via on the same electrical net. This is not a loop-inductance measurement.'
report['viaDistanceCircuitSha256']=a['report']['circuitSha256'];p.write_text(json.dumps(report,indent=2)+'\n');print('Updated via distances for',len(report['capacitors']),'capacitors')