seveibar/am3352-dev-board-4layer-dogbone

Defines PCB footprints and pin mappings for a TI AM3352ZCZ100 processor, JST GH connectors, and assembly-part lookup helpers for capacitors, resistors, and headers.

Version
0.1.5
License
unset
Stars
0

scripts/test-via-travel.py

from via_travel import via_travel
layers=['top','inner1','inner2','bottom']
def path(sequence):
 out=[]
 for i,(a,b) in enumerate(zip(sequence,sequence[1:])):
  out.extend([(i,0,a),(i,0,'top'),(i,0,b)])
 return out
for sequence in [['top','inner2','bottom','top'],['top','bottom','inner2','top']]:
 result=via_travel(path(sequence),layers,1.2)
 assert result['verticalLengthMm']==2.4,result
 assert result['layerSequence']==sequence,result
result=via_travel(path(['top','inner2','top']),layers,1.2)
assert result['verticalLengthMm'] is None,result
assert result['depthCoefficients']['inner2']==2,result
result=via_travel(path(['top','bottom','top','bottom','top']),layers,1.2)
assert result['verticalLengthMm']==4.8,result
print('Via-travel validation: both routing orders, unknown inner depth, and extra board traversal')